thread_context.hh (13641:648f3106ebdf) thread_context.hh (13693:85fa3a41014b)
1/*
2 * Copyright (c) 2011-2012, 2016-2018 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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52#include "base/types.hh"
53#include "config/the_isa.hh"
54#include "cpu/reg_class.hh"
55
56// @todo: Figure out a more architecture independent way to obtain the ITB and
57// DTB pointers.
58namespace TheISA
59{
1/*
2 * Copyright (c) 2011-2012, 2016-2018 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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52#include "base/types.hh"
53#include "config/the_isa.hh"
54#include "cpu/reg_class.hh"
55
56// @todo: Figure out a more architecture independent way to obtain the ITB and
57// DTB pointers.
58namespace TheISA
59{
60 class ISA;
60 class Decoder;
61}
62class BaseCPU;
63class BaseTLB;
64class CheckerCPU;
65class Checkpoint;
66class EndQuiesceEvent;
67class SETranslatingPortProxy;

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138 virtual void setContextId(int id) = 0;
139
140 virtual BaseTLB *getITBPtr() = 0;
141
142 virtual BaseTLB *getDTBPtr() = 0;
143
144 virtual CheckerCPU *getCheckerCpuPtr() = 0;
145
61 class Decoder;
62}
63class BaseCPU;
64class BaseTLB;
65class CheckerCPU;
66class Checkpoint;
67class EndQuiesceEvent;
68class SETranslatingPortProxy;

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139 virtual void setContextId(int id) = 0;
140
141 virtual BaseTLB *getITBPtr() = 0;
142
143 virtual BaseTLB *getDTBPtr() = 0;
144
145 virtual CheckerCPU *getCheckerCpuPtr() = 0;
146
147 virtual TheISA::ISA *getIsaPtr() = 0;
148
146 virtual TheISA::Decoder *getDecoderPtr() = 0;
147
148 virtual System *getSystemPtr() = 0;
149
150 virtual TheISA::Kernel::Statistics *getKernelStats() = 0;
151
152 virtual PortProxy &getPhysProxy() = 0;
153

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401 void setContextId(int id) { actualTC->setContextId(id); }
402
403 BaseTLB *getITBPtr() { return actualTC->getITBPtr(); }
404
405 BaseTLB *getDTBPtr() { return actualTC->getDTBPtr(); }
406
407 CheckerCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
408
149 virtual TheISA::Decoder *getDecoderPtr() = 0;
150
151 virtual System *getSystemPtr() = 0;
152
153 virtual TheISA::Kernel::Statistics *getKernelStats() = 0;
154
155 virtual PortProxy &getPhysProxy() = 0;
156

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404 void setContextId(int id) { actualTC->setContextId(id); }
405
406 BaseTLB *getITBPtr() { return actualTC->getITBPtr(); }
407
408 BaseTLB *getDTBPtr() { return actualTC->getDTBPtr(); }
409
410 CheckerCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
411
412 TheISA::ISA *getIsaPtr() { return actualTC->getIsaPtr(); }
413
409 TheISA::Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
410
411 System *getSystemPtr() { return actualTC->getSystemPtr(); }
412
413 TheISA::Kernel::Statistics *getKernelStats()
414 { return actualTC->getKernelStats(); }
415
416 PortProxy &getPhysProxy() { return actualTC->getPhysProxy(); }

--- 247 unchanged lines hidden --- 		414 TheISA::Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
415
416 System *getSystemPtr() { return actualTC->getSystemPtr(); }
417
418 TheISA::Kernel::Statistics *getKernelStats()
419 { return actualTC->getKernelStats(); }
420
421 PortProxy &getPhysProxy() { return actualTC->getPhysProxy(); }

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