thread_context.hh (12109:f29e9c5418aa) thread_context.hh (12406:86bde4a026b5)
1/*
2 * Copyright (c) 2011-2012, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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53#include "config/the_isa.hh"
54#include "cpu/reg_class.hh"
55
56// @todo: Figure out a more architecture independent way to obtain the ITB and
57// DTB pointers.
58namespace TheISA
59{
60 class Decoder;
1/*
2 * Copyright (c) 2011-2012, 2016 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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53#include "config/the_isa.hh"
54#include "cpu/reg_class.hh"
55
56// @todo: Figure out a more architecture independent way to obtain the ITB and
57// DTB pointers.
58namespace TheISA
59{
60 class Decoder;
61 class TLB;
62}
63class BaseCPU;
61}
62class BaseCPU;
63class BaseTLB;
64class CheckerCPU;
65class Checkpoint;
66class EndQuiesceEvent;
67class SETranslatingPortProxy;
68class FSTranslatingPortProxy;
69class PortProxy;
70class Process;
71class System;

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131 virtual int threadId() const = 0;
132
133 virtual void setThreadId(int id) = 0;
134
135 virtual int contextId() const = 0;
136
137 virtual void setContextId(int id) = 0;
138
64class CheckerCPU;
65class Checkpoint;
66class EndQuiesceEvent;
67class SETranslatingPortProxy;
68class FSTranslatingPortProxy;
69class PortProxy;
70class Process;
71class System;

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131 virtual int threadId() const = 0;
132
133 virtual void setThreadId(int id) = 0;
134
135 virtual int contextId() const = 0;
136
137 virtual void setContextId(int id) = 0;
138
139 virtual TheISA::TLB *getITBPtr() = 0;
139 virtual BaseTLB *getITBPtr() = 0;
140
140
141 virtual TheISA::TLB *getDTBPtr() = 0;
141 virtual BaseTLB *getDTBPtr() = 0;
142
143 virtual CheckerCPU *getCheckerCpuPtr() = 0;
144
145 virtual TheISA::Decoder *getDecoderPtr() = 0;
146
147 virtual System *getSystemPtr() = 0;
148
149 virtual TheISA::Kernel::Statistics *getKernelStats() = 0;

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389 int threadId() const { return actualTC->threadId(); }
390
391 void setThreadId(int id) { actualTC->setThreadId(id); }
392
393 int contextId() const { return actualTC->contextId(); }
394
395 void setContextId(int id) { actualTC->setContextId(id); }
396
142
143 virtual CheckerCPU *getCheckerCpuPtr() = 0;
144
145 virtual TheISA::Decoder *getDecoderPtr() = 0;
146
147 virtual System *getSystemPtr() = 0;
148
149 virtual TheISA::Kernel::Statistics *getKernelStats() = 0;

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389 int threadId() const { return actualTC->threadId(); }
390
391 void setThreadId(int id) { actualTC->setThreadId(id); }
392
393 int contextId() const { return actualTC->contextId(); }
394
395 void setContextId(int id) { actualTC->setContextId(id); }
396
397 TheISA::TLB *getITBPtr() { return actualTC->getITBPtr(); }
397 BaseTLB *getITBPtr() { return actualTC->getITBPtr(); }
398
398
399 TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
399 BaseTLB *getDTBPtr() { return actualTC->getDTBPtr(); }
400
401 CheckerCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
402
403 TheISA::Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
404
405 System *getSystemPtr() { return actualTC->getSystemPtr(); }
406
407 TheISA::Kernel::Statistics *getKernelStats()

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401 CheckerCPU *getCheckerCpuPtr() { return actualTC->getCheckerCpuPtr(); }
402
403 TheISA::Decoder *getDecoderPtr() { return actualTC->getDecoderPtr(); }
404
405 System *getSystemPtr() { return actualTC->getSystemPtr(); }
406
407 TheISA::Kernel::Statistics *getKernelStats()

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