1/* 2 * Copyright (c) 2011-2012, 2016-2018 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 56 unchanged lines hidden (view full) --- 65class CheckerCPU; 66class Checkpoint; 67class EndQuiesceEvent; 68class SETranslatingPortProxy; 69class FSTranslatingPortProxy; 70class PortProxy; 71class Process; 72class System; |
73namespace Kernel { 74 class Statistics; |
75} 76 77/** 78 * ThreadContext is the external interface to all thread state for 79 * anything outside of the CPU. It provides all accessor methods to 80 * state that might be needed by external objects, ranging from 81 * register values to things such as kernel stats. It is an abstract 82 * base class; the CPU can create its own ThreadContext by --- 60 unchanged lines hidden (view full) --- 143 virtual CheckerCPU *getCheckerCpuPtr() = 0; 144 145 virtual TheISA::ISA *getIsaPtr() = 0; 146 147 virtual TheISA::Decoder *getDecoderPtr() = 0; 148 149 virtual System *getSystemPtr() = 0; 150 |
151 virtual ::Kernel::Statistics *getKernelStats() = 0; |
152 153 virtual PortProxy &getPhysProxy() = 0; 154 155 virtual FSTranslatingPortProxy &getVirtProxy() = 0; 156 157 /** 158 * Initialise the physical and virtual port proxies and tie them to 159 * the data port of the CPU. --- 227 unchanged lines hidden --- |