1/* 2 * Copyright (c) 2011-2012, 2016-2018 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 285 unchanged lines hidden (view full) --- 294 virtual RegVal readMiscReg(RegIndex misc_reg) = 0; 295 296 virtual void setMiscRegNoEffect(RegIndex misc_reg, RegVal val) = 0; 297 298 virtual void setMiscReg(RegIndex misc_reg, RegVal val) = 0; 299 300 virtual RegId flattenRegId(const RegId& regId) const = 0; 301 |
302 // Also not necessarily the best location for these two. Hopefully will go 303 // away once we decide upon where st cond failures goes. 304 virtual unsigned readStCondFailures() const = 0; 305 306 virtual void setStCondFailures(unsigned sc_failures) = 0; 307 308 // Same with st cond failures. 309 virtual Counter readFuncExeInst() const = 0; --- 79 unchanged lines hidden --- |