thread_context.cc (13611:c8b7847b4171) thread_context.cc (13622:ba31c2a23eca)
1/*
2 * Copyright (c) 2012, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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103 RegVal t2 = two->readMiscRegNoEffect(i);
104 if (t1 != t2)
105 panic("Misc reg idx %d doesn't match, one: %#x, two: %#x",
106 i, t1, t2);
107 }
108
109 // loop through the Condition Code registers.
110 for (int i = 0; i < TheISA::NumCCRegs; ++i) {
1/*
2 * Copyright (c) 2012, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 94 unchanged lines hidden (view full) ---

103 RegVal t2 = two->readMiscRegNoEffect(i);
104 if (t1 != t2)
105 panic("Misc reg idx %d doesn't match, one: %#x, two: %#x",
106 i, t1, t2);
107 }
108
109 // loop through the Condition Code registers.
110 for (int i = 0; i < TheISA::NumCCRegs; ++i) {
111 TheISA::CCReg t1 = one->readCCReg(i);
112 TheISA::CCReg t2 = two->readCCReg(i);
111 RegVal t1 = one->readCCReg(i);
112 RegVal t2 = two->readCCReg(i);
113 if (t1 != t2)
114 panic("CC reg idx %d doesn't match, one: %#x, two: %#x",
115 i, t1, t2);
116 }
117 if (!(one->pcState() == two->pcState()))
118 panic("PC state doesn't match.");
119 int id1 = one->cpuId();
120 int id2 = two->cpuId();

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187 SERIALIZE_CONTAINER(vecPredRegs);
188
189 RegVal intRegs[NumIntRegs];
190 for (int i = 0; i < NumIntRegs; ++i)
191 intRegs[i] = tc.readIntRegFlat(i);
192 SERIALIZE_ARRAY(intRegs, NumIntRegs);
193
194#ifdef ISA_HAS_CC_REGS
113 if (t1 != t2)
114 panic("CC reg idx %d doesn't match, one: %#x, two: %#x",
115 i, t1, t2);
116 }
117 if (!(one->pcState() == two->pcState()))
118 panic("PC state doesn't match.");
119 int id1 = one->cpuId();
120 int id2 = two->cpuId();

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187 SERIALIZE_CONTAINER(vecPredRegs);
188
189 RegVal intRegs[NumIntRegs];
190 for (int i = 0; i < NumIntRegs; ++i)
191 intRegs[i] = tc.readIntRegFlat(i);
192 SERIALIZE_ARRAY(intRegs, NumIntRegs);
193
194#ifdef ISA_HAS_CC_REGS
195 CCReg ccRegs[NumCCRegs];
195 RegVal ccRegs[NumCCRegs];
196 for (int i = 0; i < NumCCRegs; ++i)
197 ccRegs[i] = tc.readCCRegFlat(i);
198 SERIALIZE_ARRAY(ccRegs, NumCCRegs);
199#endif
200
201 tc.pcState().serialize(cp);
202
203 // thread_num and cpu_id are deterministic from the config

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228 }
229
230 RegVal intRegs[NumIntRegs];
231 UNSERIALIZE_ARRAY(intRegs, NumIntRegs);
232 for (int i = 0; i < NumIntRegs; ++i)
233 tc.setIntRegFlat(i, intRegs[i]);
234
235#ifdef ISA_HAS_CC_REGS
196 for (int i = 0; i < NumCCRegs; ++i)
197 ccRegs[i] = tc.readCCRegFlat(i);
198 SERIALIZE_ARRAY(ccRegs, NumCCRegs);
199#endif
200
201 tc.pcState().serialize(cp);
202
203 // thread_num and cpu_id are deterministic from the config

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228 }
229
230 RegVal intRegs[NumIntRegs];
231 UNSERIALIZE_ARRAY(intRegs, NumIntRegs);
232 for (int i = 0; i < NumIntRegs; ++i)
233 tc.setIntRegFlat(i, intRegs[i]);
234
235#ifdef ISA_HAS_CC_REGS
236 CCReg ccRegs[NumCCRegs];
236 RegVal ccRegs[NumCCRegs];
237 UNSERIALIZE_ARRAY(ccRegs, NumCCRegs);
238 for (int i = 0; i < NumCCRegs; ++i)
239 tc.setCCRegFlat(i, ccRegs[i]);
240#endif
241
242 PCState pcState;
243 pcState.unserialize(cp);
244 tc.pcState(pcState);

--- 37 unchanged lines hidden --- 		237 UNSERIALIZE_ARRAY(ccRegs, NumCCRegs);
238 for (int i = 0; i < NumCCRegs; ++i)
239 tc.setCCRegFlat(i, ccRegs[i]);
240#endif
241
242 PCState pcState;
243 pcState.unserialize(cp);
244 tc.pcState(pcState);

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