thread_context.cc (13610:5d5404ac6288) thread_context.cc (13611:c8b7847b4171)
1/*
2 * Copyright (c) 2012, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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66 RegVal t2 = two->readIntReg(i);
67 if (t1 != t2)
68 panic("Int reg idx %d doesn't match, one: %#x, two: %#x",
69 i, t1, t2);
70 }
71
72 // Then loop through the floating point registers.
73 for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
1/*
2 * Copyright (c) 2012, 2016-2017 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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66 RegVal t2 = two->readIntReg(i);
67 if (t1 != t2)
68 panic("Int reg idx %d doesn't match, one: %#x, two: %#x",
69 i, t1, t2);
70 }
71
72 // Then loop through the floating point registers.
73 for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
74 RegVal t1 = one->readFloatRegBits(i);
75 RegVal t2 = two->readFloatRegBits(i);
74 RegVal t1 = one->readFloatReg(i);
75 RegVal t2 = two->readFloatReg(i);
76 if (t1 != t2)
77 panic("Float reg idx %d doesn't match, one: %#x, two: %#x",
78 i, t1, t2);
79 }
80
81 // Then loop through the vector registers.
82 for (int i = 0; i < TheISA::NumVecRegs; ++i) {
83 RegId rid(VecRegClass, i);

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164
165void
166serialize(ThreadContext &tc, CheckpointOut &cp)
167{
168 using namespace TheISA;
169
170 RegVal floatRegs[NumFloatRegs];
171 for (int i = 0; i < NumFloatRegs; ++i)
76 if (t1 != t2)
77 panic("Float reg idx %d doesn't match, one: %#x, two: %#x",
78 i, t1, t2);
79 }
80
81 // Then loop through the vector registers.
82 for (int i = 0; i < TheISA::NumVecRegs; ++i) {
83 RegId rid(VecRegClass, i);

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164
165void
166serialize(ThreadContext &tc, CheckpointOut &cp)
167{
168 using namespace TheISA;
169
170 RegVal floatRegs[NumFloatRegs];
171 for (int i = 0; i < NumFloatRegs; ++i)
172 floatRegs[i] = tc.readFloatRegBitsFlat(i);
172 floatRegs[i] = tc.readFloatRegFlat(i);
173 // This is a bit ugly, but needed to maintain backwards
174 // compatibility.
175 arrayParamOut(cp, "floatRegs.i", floatRegs, NumFloatRegs);
176
177 std::vector<TheISA::VecRegContainer> vecRegs(NumVecRegs);
178 for (int i = 0; i < NumVecRegs; ++i) {
179 vecRegs[i] = tc.readVecRegFlat(i);
180 }

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208{
209 using namespace TheISA;
210
211 RegVal floatRegs[NumFloatRegs];
212 // This is a bit ugly, but needed to maintain backwards
213 // compatibility.
214 arrayParamIn(cp, "floatRegs.i", floatRegs, NumFloatRegs);
215 for (int i = 0; i < NumFloatRegs; ++i)
173 // This is a bit ugly, but needed to maintain backwards
174 // compatibility.
175 arrayParamOut(cp, "floatRegs.i", floatRegs, NumFloatRegs);
176
177 std::vector<TheISA::VecRegContainer> vecRegs(NumVecRegs);
178 for (int i = 0; i < NumVecRegs; ++i) {
179 vecRegs[i] = tc.readVecRegFlat(i);
180 }

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208{
209 using namespace TheISA;
210
211 RegVal floatRegs[NumFloatRegs];
212 // This is a bit ugly, but needed to maintain backwards
213 // compatibility.
214 arrayParamIn(cp, "floatRegs.i", floatRegs, NumFloatRegs);
215 for (int i = 0; i < NumFloatRegs; ++i)
216 tc.setFloatRegBitsFlat(i, floatRegs[i]);
216 tc.setFloatRegFlat(i, floatRegs[i]);
217
218 std::vector<TheISA::VecRegContainer> vecRegs(NumVecRegs);
219 UNSERIALIZE_CONTAINER(vecRegs);
220 for (int i = 0; i < NumVecRegs; ++i) {
221 tc.setVecRegFlat(i, vecRegs[i]);
222 }
223
224 std::vector<TheISA::VecPredRegContainer> vecPredRegs(NumVecPredRegs);

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218 std::vector<TheISA::VecRegContainer> vecRegs(NumVecRegs);
219 UNSERIALIZE_CONTAINER(vecRegs);
220 for (int i = 0; i < NumVecRegs; ++i) {
221 tc.setVecRegFlat(i, vecRegs[i]);
222 }
223
224 std::vector<TheISA::VecPredRegContainer> vecPredRegs(NumVecPredRegs);

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