1/* 2 * Copyright (c) 2012 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 74 unchanged lines hidden (view full) --- 83 // loop through the Condition Code registers. 84 for (int i = 0; i < TheISA::NumCCRegs; ++i) { 85 TheISA::CCReg t1 = one->readCCReg(i); 86 TheISA::CCReg t2 = two->readCCReg(i); 87 if (t1 != t2) 88 panic("CC reg idx %d doesn't match, one: %#x, two: %#x", 89 i, t1, t2); 90 } |
91 if (!(one->pcState() == two->pcState())) 92 panic("PC state doesn't match."); 93 int id1 = one->cpuId(); 94 int id2 = two->cpuId(); 95 if (id1 != id2) 96 panic("CPU ids don't match, one: %d, two: %d", id1, id2); 97 98 id1 = one->contextId(); --- 23 unchanged lines hidden (view full) --- 122 123#ifdef ISA_HAS_CC_REGS 124 CCReg ccRegs[NumCCRegs]; 125 for (int i = 0; i < NumCCRegs; ++i) 126 ccRegs[i] = tc.readCCRegFlat(i); 127 SERIALIZE_ARRAY(ccRegs, NumCCRegs); 128#endif 129 |
130 tc.pcState().serialize(cp); 131 132 // thread_num and cpu_id are deterministic from the config 133} 134 135void 136unserialize(ThreadContext &tc, CheckpointIn &cp) 137{ --- 13 unchanged lines hidden (view full) --- 151 152#ifdef ISA_HAS_CC_REGS 153 CCReg ccRegs[NumCCRegs]; 154 UNSERIALIZE_ARRAY(ccRegs, NumCCRegs); 155 for (int i = 0; i < NumCCRegs; ++i) 156 tc.setCCRegFlat(i, ccRegs[i]); 157#endif 158 |
159 PCState pcState; 160 pcState.unserialize(cp); 161 tc.pcState(pcState); 162 163 // thread_num and cpu_id are deterministic from the config 164} 165 166void --- 32 unchanged lines hidden --- |