base.cc (12810:485ca1c27812) base.cc (12811:269967d5b4e4)
1/*
2 * Copyright (c) 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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39 * Sascha Bischoff
40 */
41#include "cpu/testers/traffic_gen/base.hh"
42
43#include <sstream>
44
45#include "base/intmath.hh"
46#include "base/random.hh"
1/*
2 * Copyright (c) 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 30 unchanged lines hidden (view full) ---

39 * Sascha Bischoff
40 */
41#include "cpu/testers/traffic_gen/base.hh"
42
43#include <sstream>
44
45#include "base/intmath.hh"
46#include "base/random.hh"
47#include "config/have_protobuf.hh"
47#include "cpu/testers/traffic_gen/base_gen.hh"
48#include "cpu/testers/traffic_gen/base_gen.hh"
49#include "cpu/testers/traffic_gen/dram_gen.hh"
50#include "cpu/testers/traffic_gen/dram_rot_gen.hh"
51#include "cpu/testers/traffic_gen/exit_gen.hh"
52#include "cpu/testers/traffic_gen/idle_gen.hh"
53#include "cpu/testers/traffic_gen/linear_gen.hh"
54#include "cpu/testers/traffic_gen/random_gen.hh"
48#include "debug/Checkpoint.hh"
49#include "debug/TrafficGen.hh"
50#include "params/BaseTrafficGen.hh"
51#include "sim/sim_exit.hh"
52#include "sim/stats.hh"
53#include "sim/system.hh"
54
55#include "debug/Checkpoint.hh"
56#include "debug/TrafficGen.hh"
57#include "params/BaseTrafficGen.hh"
58#include "sim/sim_exit.hh"
59#include "sim/stats.hh"
60#include "sim/system.hh"
61
62#if HAVE_PROTOBUF
63#include "cpu/testers/traffic_gen/trace_gen.hh"
64#endif
65
66
55using namespace std;
56
57BaseTrafficGen::BaseTrafficGen(const BaseTrafficGenParams* p)
58 : MemObject(p),
59 system(p->system),
60 elasticReq(p->elastic_req),
61 progressCheck(p->progress_check),
62 noProgressEvent([this]{ noProgress(); }, name()),

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292 .name(name() + ".numRetries")
293 .desc("Number of retries");
294
295 retryTicks
296 .name(name() + ".retryTicks")
297 .desc("Time spent waiting due to back-pressure (ticks)");
298}
299
67using namespace std;
68
69BaseTrafficGen::BaseTrafficGen(const BaseTrafficGenParams* p)
70 : MemObject(p),
71 system(p->system),
72 elasticReq(p->elastic_req),
73 progressCheck(p->progress_check),
74 noProgressEvent([this]{ noProgress(); }, name()),

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304 .name(name() + ".numRetries")
305 .desc("Number of retries");
306
307 retryTicks
308 .name(name() + ".retryTicks")
309 .desc("Time spent waiting due to back-pressure (ticks)");
310}
311
312std::shared_ptr<BaseGen>
313BaseTrafficGen::createIdle(Tick duration)
314{
315 return std::shared_ptr<BaseGen>(new IdleGen(*this, duration));
316}
317
318std::shared_ptr<BaseGen>
319BaseTrafficGen::createExit(Tick duration)
320{
321 return std::shared_ptr<BaseGen>(new ExitGen(*this, duration));
322}
323
324std::shared_ptr<BaseGen>
325BaseTrafficGen::createLinear(Tick duration,
326 Addr start_addr, Addr end_addr, Addr blocksize,
327 Tick min_period, Tick max_period,
328 uint8_t read_percent, Addr data_limit)
329{
330 return std::shared_ptr<BaseGen>(new LinearGen(*this,
331 duration, start_addr,
332 end_addr, blocksize,
333 min_period, max_period,
334 read_percent, data_limit));
335}
336
337std::shared_ptr<BaseGen>
338BaseTrafficGen::createRandom(Tick duration,
339 Addr start_addr, Addr end_addr, Addr blocksize,
340 Tick min_period, Tick max_period,
341 uint8_t read_percent, Addr data_limit)
342{
343 return std::shared_ptr<BaseGen>(new RandomGen(*this,
344 duration, start_addr,
345 end_addr, blocksize,
346 min_period, max_period,
347 read_percent, data_limit));
348}
349
350std::shared_ptr<BaseGen>
351BaseTrafficGen::createDram(Tick duration,
352 Addr start_addr, Addr end_addr, Addr blocksize,
353 Tick min_period, Tick max_period,
354 uint8_t read_percent, Addr data_limit,
355 unsigned int num_seq_pkts, unsigned int page_size,
356 unsigned int nbr_of_banks_DRAM,
357 unsigned int nbr_of_banks_util,
358 unsigned int addr_mapping,
359 unsigned int nbr_of_ranks)
360{
361 return std::shared_ptr<BaseGen>(new DramGen(*this,
362 duration, start_addr,
363 end_addr, blocksize,
364 min_period, max_period,
365 read_percent, data_limit,
366 num_seq_pkts, page_size,
367 nbr_of_banks_DRAM,
368 nbr_of_banks_util,
369 addr_mapping,
370 nbr_of_ranks));
371}
372
373std::shared_ptr<BaseGen>
374BaseTrafficGen::createDramRot(Tick duration,
375 Addr start_addr, Addr end_addr, Addr blocksize,
376 Tick min_period, Tick max_period,
377 uint8_t read_percent, Addr data_limit,
378 unsigned int num_seq_pkts,
379 unsigned int page_size,
380 unsigned int nbr_of_banks_DRAM,
381 unsigned int nbr_of_banks_util,
382 unsigned int addr_mapping,
383 unsigned int nbr_of_ranks,
384 unsigned int max_seq_count_per_rank)
385{
386 return std::shared_ptr<BaseGen>(new DramRotGen(*this,
387 duration, start_addr,
388 end_addr, blocksize,
389 min_period, max_period,
390 read_percent, data_limit,
391 num_seq_pkts, page_size,
392 nbr_of_banks_DRAM,
393 nbr_of_banks_util,
394 addr_mapping,
395 nbr_of_ranks,
396 max_seq_count_per_rank));
397}
398
399std::shared_ptr<BaseGen>
400BaseTrafficGen::createTrace(Tick duration,
401 const std::string& trace_file, Addr addr_offset)
402{
403#if HAVE_PROTOBUF
404 return std::shared_ptr<BaseGen>(
405 new TraceGen(*this, duration, trace_file, addr_offset));
406#else
407 panic("Can't instantiate trace generation without Protobuf support!\n");
408#endif
409}
410
300bool
301BaseTrafficGen::TrafficGenPort::recvTimingResp(PacketPtr pkt)
302{
303 delete pkt;
304
305 return true;
306}
411bool
412BaseTrafficGen::TrafficGenPort::recvTimingResp(PacketPtr pkt)
413{
414 delete pkt;
415
416 return true;
417}