RubyTester.cc (9171:ae88ecf37145) RubyTester.cc (9294:8fb03b13de02)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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106 }
107
108 m_num_writers = writePorts.size();
109 m_num_readers = readPorts.size();
110
111 m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this);
112}
113
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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106 }
107
108 m_num_writers = writePorts.size();
109 m_num_readers = readPorts.size();
110
111 m_checkTable_ptr = new CheckTable(m_num_writers, m_num_readers, this);
112}
113
114MasterPort &
115RubyTester::getMasterPort(const std::string &if_name, int idx)
114BaseMasterPort &
115RubyTester::getMasterPort(const std::string &if_name, PortID idx)
116{
117 if (if_name != "cpuInstPort" && if_name != "cpuDataPort") {
118 // pass it along to our super class
119 return MemObject::getMasterPort(if_name, idx);
120 } else {
121 if (if_name == "cpuInstPort") {
122 if (idx > m_num_inst_ports) {
123 panic("RubyTester::getMasterPort: unknown inst port idx %d\n",

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129 return *readPorts[idx];
130 } else {
131 assert(if_name == "cpuDataPort");
132 //
133 // add the inst port offset to translate to the correct read port
134 // index
135 //
136 int read_idx = idx + m_num_inst_ports;
116{
117 if (if_name != "cpuInstPort" && if_name != "cpuDataPort") {
118 // pass it along to our super class
119 return MemObject::getMasterPort(if_name, idx);
120 } else {
121 if (if_name == "cpuInstPort") {
122 if (idx > m_num_inst_ports) {
123 panic("RubyTester::getMasterPort: unknown inst port idx %d\n",

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129 return *readPorts[idx];
130 } else {
131 assert(if_name == "cpuDataPort");
132 //
133 // add the inst port offset to translate to the correct read port
134 // index
135 //
136 int read_idx = idx + m_num_inst_ports;
137 if (read_idx >= static_cast<int>(readPorts.size())) {
137 if (read_idx >= static_cast<PortID>(readPorts.size())) {
138 panic("RubyTester::getMasterPort: unknown data port idx %d\n",
139 idx);
140 }
141 return *readPorts[read_idx];
142 }
143 }
144}
145

--- 109 unchanged lines hidden --- 		138 panic("RubyTester::getMasterPort: unknown data port idx %d\n",
139 idx);
140 }
141 return *readPorts[read_idx];
142 }
143 }
144}
145

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