Check.cc (8949:3fa1ee293096) Check.cc (8950:a6830d615eff)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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77}
78
79void
80Check::initiatePrefetch()
81{
82 DPRINTF(RubyTest, "initiating prefetch\n");
83
84 int index = random() % m_num_readers;
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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77}
78
79void
80Check::initiatePrefetch()
81{
82 DPRINTF(RubyTest, "initiating prefetch\n");
83
84 int index = random() % m_num_readers;
85 RubyTester::CpuPort* port =
86 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getReadableCpuPort(index));
85 MasterPort* port = m_tester_ptr->getReadableCpuPort(index);
87
88 Request::Flags flags;
89 flags.set(Request::PREFETCH);
90
91 Packet::Command cmd;
92
93 // 1 in 8 chance this will be an exclusive prefetch
94 if ((random() & 0x7) != 0) {
95 cmd = MemCmd::ReadReq;
96
97 // if necessary, make the request an instruction fetch
86
87 Request::Flags flags;
88 flags.set(Request::PREFETCH);
89
90 Packet::Command cmd;
91
92 // 1 in 8 chance this will be an exclusive prefetch
93 if ((random() & 0x7) != 0) {
94 cmd = MemCmd::ReadReq;
95
96 // if necessary, make the request an instruction fetch
98 if (port->type == RubyTester::CpuPort::InstOnly) {
97 if (m_tester_ptr->isInstReadableCpuPort(index)) {
99 flags.set(Request::INST_FETCH);
100 }
101 } else {
102 cmd = MemCmd::WriteReq;
103 flags.set(Request::PF_EXCLUSIVE);
104 }
105
106 // Prefetches are assumed to be 0 sized

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132
133void
134Check::initiateFlush()
135{
136
137 DPRINTF(RubyTest, "initiating Flush\n");
138
139 int index = random() % m_num_writers;
98 flags.set(Request::INST_FETCH);
99 }
100 } else {
101 cmd = MemCmd::WriteReq;
102 flags.set(Request::PF_EXCLUSIVE);
103 }
104
105 // Prefetches are assumed to be 0 sized

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131
132void
133Check::initiateFlush()
134{
135
136 DPRINTF(RubyTest, "initiating Flush\n");
137
138 int index = random() % m_num_writers;
140 RubyTester::CpuPort* port =
141 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getWritableCpuPort(index));
139 MasterPort* port = m_tester_ptr->getWritableCpuPort(index);
142
143 Request::Flags flags;
144
145 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
146 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
147
148 Packet::Command cmd;
149

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163
164void
165Check::initiateAction()
166{
167 DPRINTF(RubyTest, "initiating Action\n");
168 assert(m_status == TesterStatus_Idle);
169
170 int index = random() % m_num_writers;
140
141 Request::Flags flags;
142
143 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
144 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
145
146 Packet::Command cmd;
147

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161
162void
163Check::initiateAction()
164{
165 DPRINTF(RubyTest, "initiating Action\n");
166 assert(m_status == TesterStatus_Idle);
167
168 int index = random() % m_num_writers;
171 RubyTester::CpuPort* port =
172 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getWritableCpuPort(index));
169 MasterPort* port = m_tester_ptr->getWritableCpuPort(index);
173
174 Request::Flags flags;
175
176 // Create the particular address for the next byte to be written
177 Address writeAddr(m_address.getAddress() + m_store_count);
178
179 // Stores are assumed to be 1 byte-sized
180 Request *req = new Request(writeAddr.getAddress(), 1, flags,

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228
229void
230Check::initiateCheck()
231{
232 DPRINTF(RubyTest, "Initiating Check\n");
233 assert(m_status == TesterStatus_Ready);
234
235 int index = random() % m_num_readers;
170
171 Request::Flags flags;
172
173 // Create the particular address for the next byte to be written
174 Address writeAddr(m_address.getAddress() + m_store_count);
175
176 // Stores are assumed to be 1 byte-sized
177 Request *req = new Request(writeAddr.getAddress(), 1, flags,

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225
226void
227Check::initiateCheck()
228{
229 DPRINTF(RubyTest, "Initiating Check\n");
230 assert(m_status == TesterStatus_Ready);
231
232 int index = random() % m_num_readers;
236 RubyTester::CpuPort* port =
237 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getReadableCpuPort(index));
233 MasterPort* port = m_tester_ptr->getReadableCpuPort(index);
238
239 Request::Flags flags;
240
241 // If necessary, make the request an instruction fetch
234
235 Request::Flags flags;
236
237 // If necessary, make the request an instruction fetch
242 if (port->type == RubyTester::CpuPort::InstOnly) {
238 if (m_tester_ptr->isInstReadableCpuPort(index)) {
243 flags.set(Request::INST_FETCH);
244 }
245
246 // Checks are sized depending on the number of bytes written
247 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
248 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
249
250 req->setThreadContext(index, 0);

--- 142 unchanged lines hidden --- 		239 flags.set(Request::INST_FETCH);
240 }
241
242 // Checks are sized depending on the number of bytes written
243 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
244 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
245
246 req->setThreadContext(index, 0);

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