Check.cc (8184:a8d64545cda6) Check.cc (8190:8c68155aac00)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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99 } else {
100 cmd = MemCmd::WriteReq;
101 flags.set(Request::PF_EXCLUSIVE);
102 }
103
104 // Prefetches are assumed to be 0 sized
105 Request *req = new Request(m_address.getAddress(), 0, flags, curTick(),
106 m_pc.getAddress());
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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99 } else {
100 cmd = MemCmd::WriteReq;
101 flags.set(Request::PF_EXCLUSIVE);
102 }
103
104 // Prefetches are assumed to be 0 sized
105 Request *req = new Request(m_address.getAddress(), 0, flags, curTick(),
106 m_pc.getAddress());
107 req->setThreadContext(index, 0);
107
108 PacketPtr pkt = new Packet(req, cmd, port->idx);
109
110 // push the subblock onto the sender state. The sequencer will
111 // update the subblock on the return
112 pkt->senderState =
113 new SenderState(m_address, req->getSize(), pkt->senderState);
114

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172
173 // Create the particular address for the next byte to be written
174 Address writeAddr(m_address.getAddress() + m_store_count);
175
176 // Stores are assumed to be 1 byte-sized
177 Request *req = new Request(writeAddr.getAddress(), 1, flags, curTick(),
178 m_pc.getAddress());
179
108
109 PacketPtr pkt = new Packet(req, cmd, port->idx);
110
111 // push the subblock onto the sender state. The sequencer will
112 // update the subblock on the return
113 pkt->senderState =
114 new SenderState(m_address, req->getSize(), pkt->senderState);
115

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173
174 // Create the particular address for the next byte to be written
175 Address writeAddr(m_address.getAddress() + m_store_count);
176
177 // Stores are assumed to be 1 byte-sized
178 Request *req = new Request(writeAddr.getAddress(), 1, flags, curTick(),
179 m_pc.getAddress());
180
181 req->setThreadContext(index, 0);
180 Packet::Command cmd;
181
182 // 1 out of 8 chance, issue an atomic rather than a write
183 // if ((random() & 0x7) == 0) {
184 // cmd = MemCmd::SwapReq;
185 // } else {
186 cmd = MemCmd::WriteReq;
187 // }

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237 if ((random() & 0x1) == 0) {
238 flags.set(Request::INST_FETCH);
239 }
240
241 // Checks are sized depending on the number of bytes written
242 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
243 curTick(), m_pc.getAddress());
244
182 Packet::Command cmd;
183
184 // 1 out of 8 chance, issue an atomic rather than a write
185 // if ((random() & 0x7) == 0) {
186 // cmd = MemCmd::SwapReq;
187 // } else {
188 cmd = MemCmd::WriteReq;
189 // }

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239 if ((random() & 0x1) == 0) {
240 flags.set(Request::INST_FETCH);
241 }
242
243 // Checks are sized depending on the number of bytes written
244 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
245 curTick(), m_pc.getAddress());
246
247 req->setThreadContext(index, 0);
245 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, port->idx);
246 uint8_t* dataArray = new uint8_t[CHECK_SIZE];
247 pkt->dataDynamicArray(dataArray);
248
249 // push the subblock onto the sender state. The sequencer will
250 // update the subblock on the return
251 pkt->senderState =
252 new SenderState(m_address, req->getSize(), pkt->senderState);

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248 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, port->idx);
249 uint8_t* dataArray = new uint8_t[CHECK_SIZE];
250 pkt->dataDynamicArray(dataArray);
251
252 // push the subblock onto the sender state. The sequencer will
253 // update the subblock on the return
254 pkt->senderState =
255 new SenderState(m_address, req->getSize(), pkt->senderState);

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