Check.cc (7805:f249937228b5) Check.cc (7823:dac01f14f20f)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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93 flags.set(Request::INST_FETCH);
94 }
95 } else {
96 cmd = MemCmd::WriteReq;
97 flags.set(Request::PF_EXCLUSIVE);
98 }
99
100 // Prefetches are assumed to be 0 sized
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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93 flags.set(Request::INST_FETCH);
94 }
95 } else {
96 cmd = MemCmd::WriteReq;
97 flags.set(Request::PF_EXCLUSIVE);
98 }
99
100 // Prefetches are assumed to be 0 sized
101 Request *req = new Request(m_address.getAddress(), 0, flags, curTick,
101 Request *req = new Request(m_address.getAddress(), 0, flags, curTick(),
102 m_pc.getAddress());
103
104 PacketPtr pkt = new Packet(req, cmd, port->idx);
105
106 // push the subblock onto the sender state. The sequencer will
107 // update the subblock on the return
108 pkt->senderState =
109 new SenderState(m_address, req->getSize(), pkt->senderState);

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134 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getCpuPort(index));
135
136 Request::Flags flags;
137
138 // Create the particular address for the next byte to be written
139 Address writeAddr(m_address.getAddress() + m_store_count);
140
141 // Stores are assumed to be 1 byte-sized
102 m_pc.getAddress());
103
104 PacketPtr pkt = new Packet(req, cmd, port->idx);
105
106 // push the subblock onto the sender state. The sequencer will
107 // update the subblock on the return
108 pkt->senderState =
109 new SenderState(m_address, req->getSize(), pkt->senderState);

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134 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getCpuPort(index));
135
136 Request::Flags flags;
137
138 // Create the particular address for the next byte to be written
139 Address writeAddr(m_address.getAddress() + m_store_count);
140
141 // Stores are assumed to be 1 byte-sized
142 Request *req = new Request(writeAddr.getAddress(), 1, flags, curTick,
142 Request *req = new Request(writeAddr.getAddress(), 1, flags, curTick(),
143 m_pc.getAddress());
144
145 Packet::Command cmd;
146
147 // 1 out of 8 chance, issue an atomic rather than a write
148 // if ((random() & 0x7) == 0) {
149 // cmd = MemCmd::SwapReq;
150 // } else {

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200
201 // 50% chance that the request will be an instruction fetch
202 if ((random() & 0x1) == 0) {
203 flags.set(Request::INST_FETCH);
204 }
205
206 // Checks are sized depending on the number of bytes written
207 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
143 m_pc.getAddress());
144
145 Packet::Command cmd;
146
147 // 1 out of 8 chance, issue an atomic rather than a write
148 // if ((random() & 0x7) == 0) {
149 // cmd = MemCmd::SwapReq;
150 // } else {

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200
201 // 50% chance that the request will be an instruction fetch
202 if ((random() & 0x1) == 0) {
203 flags.set(Request::INST_FETCH);
204 }
205
206 // Checks are sized depending on the number of bytes written
207 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
208 curTick, m_pc.getAddress());
208 curTick(), m_pc.getAddress());
209
210 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, port->idx);
211 uint8_t* dataArray = new uint8_t[CHECK_SIZE];
212 pkt->dataDynamicArray(dataArray);
213
214 // push the subblock onto the sender state. The sequencer will
215 // update the subblock on the return
216 pkt->senderState =

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210 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, port->idx);
211 uint8_t* dataArray = new uint8_t[CHECK_SIZE];
212 pkt->dataDynamicArray(dataArray);
213
214 // push the subblock onto the sender state. The sequencer will
215 // update the subblock on the return
216 pkt->senderState =

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