1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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31#include "debug/RubyTest.hh"
32#include "mem/ruby/common/SubBlock.hh"
33#include "mem/ruby/system/Sequencer.hh"
34#include "mem/ruby/system/System.hh"
35
36typedef RubyTester::SenderState SenderState;
37
38Check::Check(const Address& address, const Address& pc,
39 int _num_writers, int _num_readers, RubyTester* _tester)
40 : m_num_writers(_num_writers), m_num_readers(_num_readers),
41 m_tester_ptr(_tester)
42{
43 m_status = TesterStatus_Idle;
44
45 pickValue();
46 pickInitiatingNode();
47 changeAddress(address);
48 m_pc = pc;
49 m_access_mode = RubyAccessMode(random() % RubyAccessMode_NUM);

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76 }
77}
78
79void
80Check::initiatePrefetch()
81{
82 DPRINTF(RubyTest, "initiating prefetch\n");
83
84 int index = random() % m_num_readers;
85 RubyTester::CpuPort* port =
86 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getReadableCpuPort(index));
87
88 Request::Flags flags;
89 flags.set(Request::PREFETCH);
90
91 Packet::Command cmd;
92
93 // 1 in 8 chance this will be an exclusive prefetch
94 if ((random() & 0x7) != 0) {
95 cmd = MemCmd::ReadReq;
96
97 // if necessary, make the request an instruction fetch
98 if (port->type == RubyTester::CpuPort::InstOnly) {
99 flags.set(Request::INST_FETCH);
100 }
101 } else {
102 cmd = MemCmd::WriteReq;
103 flags.set(Request::PF_EXCLUSIVE);
104 }
105
106 // Prefetches are assumed to be 0 sized

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131}
132
133void
134Check::initiateFlush()
135{
136
137 DPRINTF(RubyTest, "initiating Flush\n");
138
139 int index = random() % m_num_writers;
140 RubyTester::CpuPort* port =
141 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getWritableCpuPort(index));
142
143 Request::Flags flags;
144
145 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
146 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
147
148 Packet::Command cmd;
149

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162}
163
164void
165Check::initiateAction()
166{
167 DPRINTF(RubyTest, "initiating Action\n");
168 assert(m_status == TesterStatus_Idle);
169
170 int index = random() % m_num_writers;
171 RubyTester::CpuPort* port =
172 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getWritableCpuPort(index));
173
174 Request::Flags flags;
175
176 // Create the particular address for the next byte to be written
177 Address writeAddr(m_address.getAddress() + m_store_count);
178
179 // Stores are assumed to be 1 byte-sized
180 Request *req = new Request(writeAddr.getAddress(), 1, flags,

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227}
228
229void
230Check::initiateCheck()
231{
232 DPRINTF(RubyTest, "Initiating Check\n");
233 assert(m_status == TesterStatus_Ready);
234
235 int index = random() % m_num_readers;
236 RubyTester::CpuPort* port =
237 safe_cast<RubyTester::CpuPort*>(m_tester_ptr->getReadableCpuPort(index));
238
239 Request::Flags flags;
240
241 // If necessary, make the request an instruction fetch
242 if (port->type == RubyTester::CpuPort::InstOnly) {
243 flags.set(Request::INST_FETCH);
244 }
245
246 // Checks are sized depending on the number of bytes written
247 Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags,
248 m_tester_ptr->masterId(), curTick(), m_pc.getAddress());
249
250 req->setThreadContext(index, 0);

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359 m_store_count = 0;
360}
361
362void
363Check::pickInitiatingNode()
364{
365 assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready);
366 m_status = TesterStatus_Idle;
367 m_initiatingNode = (random() % m_num_writers);
368 DPRINTF(RubyTest, "picked initiating node %d\n", m_initiatingNode);
369 m_store_count = 0;
370}
371
372void
373Check::print(std::ostream& out) const
374{
375 out << "["

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