memtest.cc (9301:1e8d01c15a77) memtest.cc (9814:7ad2b0186a32)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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90
91}
92
93MemTest::MemTest(const Params *p)
94 : MemObject(p),
95 tickEvent(this),
96 cachePort("test", this),
97 funcPort("functional", this),
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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90
91}
92
93MemTest::MemTest(const Params *p)
94 : MemObject(p),
95 tickEvent(this),
96 cachePort("test", this),
97 funcPort("functional", this),
98 funcProxy(funcPort),
98 funcProxy(funcPort, p->sys->cacheLineSize()),
99 retryPkt(NULL),
100// mainMem(main_mem),
101// checkMem(check_mem),
102 size(p->memory_size),
103 percentReads(p->percent_reads),
104 percentFunctional(p->percent_functional),
105 percentUncacheable(p->percent_uncacheable),
106 issueDmas(p->issue_dmas),
107 masterId(p->sys->getMasterId(name())),
99 retryPkt(NULL),
100// mainMem(main_mem),
101// checkMem(check_mem),
102 size(p->memory_size),
103 percentReads(p->percent_reads),
104 percentFunctional(p->percent_functional),
105 percentUncacheable(p->percent_uncacheable),
106 issueDmas(p->issue_dmas),
107 masterId(p->sys->getMasterId(name())),
108 blockSize(p->sys->cacheLineSize()),
108 progressInterval(p->progress_interval),
109 nextProgressMessage(p->progress_interval),
110 percentSourceUnaligned(p->percent_source_unaligned),
111 percentDestUnaligned(p->percent_dest_unaligned),
112 maxLoads(p->max_loads),
113 atomic(p->atomic),
114 suppress_func_warnings(p->suppress_func_warnings)
115{
116 id = TESTER_ALLOCATOR++;
117
118 // Needs to be masked off once we know the block size.
119 traceBlockAddr = p->trace_addr;
120 baseAddr1 = 0x100000;
121 baseAddr2 = 0x400000;
122 uncacheAddr = 0x800000;
123
109 progressInterval(p->progress_interval),
110 nextProgressMessage(p->progress_interval),
111 percentSourceUnaligned(p->percent_source_unaligned),
112 percentDestUnaligned(p->percent_dest_unaligned),
113 maxLoads(p->max_loads),
114 atomic(p->atomic),
115 suppress_func_warnings(p->suppress_func_warnings)
116{
117 id = TESTER_ALLOCATOR++;
118
119 // Needs to be masked off once we know the block size.
120 traceBlockAddr = p->trace_addr;
121 baseAddr1 = 0x100000;
122 baseAddr2 = 0x400000;
123 uncacheAddr = 0x800000;
124
125 blockAddrMask = blockSize - 1;
126 traceBlockAddr = blockAddr(traceBlockAddr);
127
124 // set up counters
125 noResponseCycles = 0;
126 numReads = 0;
127 numWrites = 0;
128 schedule(tickEvent, 0);
129
130 accessRetry = false;
131 dmaOutstanding = false;

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140 return cachePort;
141 else
142 return MemObject::getMasterPort(if_name, idx);
143}
144
145void
146MemTest::init()
147{
128 // set up counters
129 noResponseCycles = 0;
130 numReads = 0;
131 numWrites = 0;
132 schedule(tickEvent, 0);
133
134 accessRetry = false;
135 dmaOutstanding = false;

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144 return cachePort;
145 else
146 return MemObject::getMasterPort(if_name, idx);
147}
148
149void
150MemTest::init()
151{
148 // By the time init() is called, the ports should be hooked up.
149 blockSize = cachePort.peerBlockSize();
150 blockAddrMask = blockSize - 1;
151 traceBlockAddr = blockAddr(traceBlockAddr);
152
153 // initial memory contents for both physical memory and functional
154 // memory should be 0; no need to initialize them.
155}
156
157
158void
159MemTest::completeRequest(PacketPtr pkt)
160{

--- 227 unchanged lines hidden --- 		152 // initial memory contents for both physical memory and functional
153 // memory should be 0; no need to initialize them.
154}
155
156
157void
158MemTest::completeRequest(PacketPtr pkt)
159{

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