memtest.cc (8853:0216ed80991b) memtest.cc (8922:17f037ad8918)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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80 //Do nothing if we see one come through
81// if (curTick() != 0)//Supress warning durring initialization
82// warn("Functional Writes not implemented in MemTester\n");
83 //Need to find any response values that intersect and update
84 return;
85}
86
87void
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 71 unchanged lines hidden (view full) ---

80 //Do nothing if we see one come through
81// if (curTick() != 0)//Supress warning durring initialization
82// warn("Functional Writes not implemented in MemTester\n");
83 //Need to find any response values that intersect and update
84 return;
85}
86
87void
88MemTest::CpuPort::recvRangeChange()
89{
90}
91
92void
93MemTest::CpuPort::recvRetry()
94{
95 memtest->doRetry();
96}
97
98void
99MemTest::sendPkt(PacketPtr pkt) {
100 if (atomic) {

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156 numReads = 0;
157 numWrites = 0;
158 schedule(tickEvent, 0);
159
160 accessRetry = false;
161 dmaOutstanding = false;
162}
163
88MemTest::CpuPort::recvRetry()
89{
90 memtest->doRetry();
91}
92
93void
94MemTest::sendPkt(PacketPtr pkt) {
95 if (atomic) {

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151 numReads = 0;
152 numWrites = 0;
153 schedule(tickEvent, 0);
154
155 accessRetry = false;
156 dmaOutstanding = false;
157}
158
164Port *
165MemTest::getPort(const std::string &if_name, int idx)
159MasterPort &
160MemTest::getMasterPort(const std::string &if_name, int idx)
166{
167 if (if_name == "functional")
161{
162 if (if_name == "functional")
168 return &funcPort;
163 return funcPort;
169 else if (if_name == "test")
164 else if (if_name == "test")
170 return &cachePort;
165 return cachePort;
171 else
166 else
172 panic("No Such Port\n");
167 return MemObject::getMasterPort(if_name, idx);
173}
174
175void
176MemTest::init()
177{
178 // By the time init() is called, the ports should be hooked up.
179 blockSize = cachePort.peerBlockSize();
180 blockAddrMask = blockSize - 1;

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169
170void
171MemTest::init()
172{
173 // By the time init() is called, the ports should be hooked up.
174 blockSize = cachePort.peerBlockSize();
175 blockAddrMask = blockSize - 1;

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