memtest.cc (13892:0182a0601f66) memtest.cc (14027:91889263c6d1)
1/*
1/*
2 * Copyright (c) 2015 ARM Limited
2 * Copyright (c) 2015, 2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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115
116 // set up counters
117 numReads = 0;
118 numWrites = 0;
119
120 // kick things into action
121 schedule(tickEvent, curTick());
122 schedule(noRequestEvent, clockEdge(progressCheck));
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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115
116 // set up counters
117 numReads = 0;
118 numWrites = 0;
119
120 // kick things into action
121 schedule(tickEvent, curTick());
122 schedule(noRequestEvent, clockEdge(progressCheck));
123 schedule(noResponseEvent, clockEdge(progressCheck));
124}
125
126Port &
127MemTest::getPort(const std::string &if_name, PortID idx)
128{
129 if (if_name == "port")
130 return port;
131 else

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184 numWrites++;
185 numWritesStat++;
186 }
187 }
188
189 // the packet will delete the data
190 delete pkt;
191
123}
124
125Port &
126MemTest::getPort(const std::string &if_name, PortID idx)
127{
128 if (if_name == "port")
129 return port;
130 else

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183 numWrites++;
184 numWritesStat++;
185 }
186 }
187
188 // the packet will delete the data
189 delete pkt;
190
192 // finally shift the response timeout forward
193 reschedule(noResponseEvent, clockEdge(progressCheck), true);
191 // finally shift the response timeout forward if we are still
192 // expecting responses; deschedule it otherwise
193 if (outstandingAddrs.size() != 0)
194 reschedule(noResponseEvent, clockEdge(progressCheck));
195 else if (noResponseEvent.scheduled())
196 deschedule(noResponseEvent);
194}
195
196void
197MemTest::regStats()
198{
199 ClockedObject::regStats();
200
201 using namespace Stats;

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298 schedule(tickEvent, clockEdge(interval));
299
300 // finally shift the timeout for sending of requests forwards
301 // as we have successfully sent a packet
302 reschedule(noRequestEvent, clockEdge(progressCheck), true);
303 } else {
304 DPRINTF(MemTest, "Waiting for retry\n");
305 }
197}
198
199void
200MemTest::regStats()
201{
202 ClockedObject::regStats();
203
204 using namespace Stats;

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301 schedule(tickEvent, clockEdge(interval));
302
303 // finally shift the timeout for sending of requests forwards
304 // as we have successfully sent a packet
305 reschedule(noRequestEvent, clockEdge(progressCheck), true);
306 } else {
307 DPRINTF(MemTest, "Waiting for retry\n");
308 }
309
310 // Schedule noResponseEvent now if we are expecting a response
311 if (!noResponseEvent.scheduled() && (outstandingAddrs.size() != 0))
312 schedule(noResponseEvent, clockEdge(progressCheck));
306}
307
308void
309MemTest::noRequest()
310{
311 panic("%s did not send a request for %d cycles", name(), progressCheck);
312}
313

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322{
323 assert(retryPkt);
324 if (port.sendTimingReq(retryPkt)) {
325 DPRINTF(MemTest, "Proceeding after successful retry\n");
326
327 retryPkt = nullptr;
328 // kick things into action again
329 schedule(tickEvent, clockEdge(interval));
313}
314
315void
316MemTest::noRequest()
317{
318 panic("%s did not send a request for %d cycles", name(), progressCheck);
319}
320

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329{
330 assert(retryPkt);
331 if (port.sendTimingReq(retryPkt)) {
332 DPRINTF(MemTest, "Proceeding after successful retry\n");
333
334 retryPkt = nullptr;
335 // kick things into action again
336 schedule(tickEvent, clockEdge(interval));
337 reschedule(noRequestEvent, clockEdge(progressCheck), true);
330 }
331}
332
333MemTest *
334MemTestParams::create()
335{
336 return new MemTest(this);
337}
338 }
339}
340
341MemTest *
342MemTestParams::create()
343{
344 return new MemTest(this);
345}