memtest.cc (13784:1941dc118243) | memtest.cc (13892:0182a0601f66) |
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1/* 2 * Copyright (c) 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43 */ 44 45#include "cpu/testers/memtest/memtest.hh" 46 47#include "base/random.hh" 48#include "base/statistics.hh" 49#include "base/trace.hh" 50#include "debug/MemTest.hh" | 1/* 2 * Copyright (c) 2015 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43 */ 44 45#include "cpu/testers/memtest/memtest.hh" 46 47#include "base/random.hh" 48#include "base/statistics.hh" 49#include "base/trace.hh" 50#include "debug/MemTest.hh" |
51#include "mem/mem_object.hh" | |
52#include "sim/sim_exit.hh" 53#include "sim/stats.hh" 54#include "sim/system.hh" 55 56using namespace std; 57 58unsigned int TESTER_ALLOCATOR = 0; 59 --- 20 unchanged lines hidden (view full) --- 80 retryPkt = pkt; 81 return false; 82 } 83 } 84 return true; 85} 86 87MemTest::MemTest(const Params *p) | 51#include "sim/sim_exit.hh" 52#include "sim/stats.hh" 53#include "sim/system.hh" 54 55using namespace std; 56 57unsigned int TESTER_ALLOCATOR = 0; 58 --- 20 unchanged lines hidden (view full) --- 79 retryPkt = pkt; 80 return false; 81 } 82 } 83 return true; 84} 85 86MemTest::MemTest(const Params *p) |
88 : MemObject(p), | 87 : ClockedObject(p), |
89 tickEvent([this]{ tick(); }, name()), 90 noRequestEvent([this]{ noRequest(); }, name()), 91 noResponseEvent([this]{ noResponse(); }, name()), 92 port("port", *this), 93 retryPkt(nullptr), 94 size(p->size), 95 interval(p->interval), 96 percentReads(p->percent_reads), --- 28 unchanged lines hidden (view full) --- 125} 126 127Port & 128MemTest::getPort(const std::string &if_name, PortID idx) 129{ 130 if (if_name == "port") 131 return port; 132 else | 88 tickEvent([this]{ tick(); }, name()), 89 noRequestEvent([this]{ noRequest(); }, name()), 90 noResponseEvent([this]{ noResponse(); }, name()), 91 port("port", *this), 92 retryPkt(nullptr), 93 size(p->size), 94 interval(p->interval), 95 percentReads(p->percent_reads), --- 28 unchanged lines hidden (view full) --- 124} 125 126Port & 127MemTest::getPort(const std::string &if_name, PortID idx) 128{ 129 if (if_name == "port") 130 return port; 131 else |
133 return MemObject::getPort(if_name, idx); | 132 return ClockedObject::getPort(if_name, idx); |
134} 135 136void 137MemTest::completeRequest(PacketPtr pkt, bool functional) 138{ 139 const RequestPtr &req = pkt->req; 140 assert(req->getSize() == 1); 141 --- 50 unchanged lines hidden (view full) --- 192 193 // finally shift the response timeout forward 194 reschedule(noResponseEvent, clockEdge(progressCheck), true); 195} 196 197void 198MemTest::regStats() 199{ | 133} 134 135void 136MemTest::completeRequest(PacketPtr pkt, bool functional) 137{ 138 const RequestPtr &req = pkt->req; 139 assert(req->getSize() == 1); 140 --- 50 unchanged lines hidden (view full) --- 191 192 // finally shift the response timeout forward 193 reschedule(noResponseEvent, clockEdge(progressCheck), true); 194} 195 196void 197MemTest::regStats() 198{ |
200 MemObject::regStats(); | 199 ClockedObject::regStats(); |
201 202 using namespace Stats; 203 204 numReadsStat 205 .name(name() + ".num_reads") 206 .desc("number of read accesses completed") 207 ; 208 --- 130 unchanged lines hidden --- | 200 201 using namespace Stats; 202 203 numReadsStat 204 .name(name() + ".num_reads") 205 .desc("number of read accesses completed") 206 ; 207 --- 130 unchanged lines hidden --- |