1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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32// FIX ME: make trackBlkAddr use blocksize from actual cache, not hard coded
33
34#include <iomanip>
35#include <set>
36#include <string>
37#include <vector>
38
39#include "base/misc.hh"
40#include "base/statistics.hh"
41#include "cpu/testers/memtest/memtest.hh"
42#include "debug/MemTest.hh"
43#include "mem/mem_object.hh"
44#include "mem/packet.hh"
45#include "mem/port.hh"
46#include "mem/request.hh"
47#include "sim/sim_events.hh"

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256 }
257
258 if (accessRetry || (issueDmas && dmaOutstanding)) {
259 DPRINTF(MemTest, "MemTester waiting on accessRetry or DMA response\n");
260 return;
261 }
262
263 //make new request
264 unsigned cmd = random() % 100;
265 unsigned offset = random() % size;
266 unsigned base = random() % 2;
267 uint64_t data = random();
268 unsigned access_size = random() % 4;
269 bool uncacheable = (random() % 100) < percentUncacheable;
270
271 unsigned dma_access_size = random() % 4;
272
273 //If we aren't doing copies, use id as offset, and do a false sharing
274 //mem tester
275 //We can eliminate the lower bits of the offset, and then use the id
276 //to offset within the blks
277 offset = blockAddr(offset);
278 offset += id;
279 access_size = 0;

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291
292 // For now we only allow one outstanding request per address
293 // per tester This means we assume CPU does write forwarding
294 // to reads that alias something in the cpu store buffer.
295 if (outstandingAddrs.find(paddr) != outstandingAddrs.end()) {
296 return;
297 }
298
299 bool do_functional = (random() % 100 < percentFunctional) && !uncacheable;
300 Request *req = new Request();
301 uint8_t *result = new uint8_t[8];
302
303 if (issueDmas) {
304 paddr &= ~((1 << dma_access_size) - 1);
305 req->setPhys(paddr, 1 << dma_access_size, flags, masterId);
306 req->setThreadContext(id,0);
307 } else {

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