1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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141 percentFunctional(p->percent_functional),
142 percentUncacheable(p->percent_uncacheable),
143 issueDmas(p->issue_dmas),
144 progressInterval(p->progress_interval),
145 nextProgressMessage(p->progress_interval),
146 percentSourceUnaligned(p->percent_source_unaligned),
147 percentDestUnaligned(p->percent_dest_unaligned),
148 maxLoads(p->max_loads),
149 atomic(p->atomic)
150{
151 cachePort.snoopRangeSent = false;
152 funcPort.snoopRangeSent = true;
153
154 id = TESTER_ALLOCATOR++;
155
156 // Needs to be masked off once we know the block size.
157 traceBlockAddr = p->trace_addr;
158 baseAddr1 = 0x100000;
159 baseAddr2 = 0x400000;
160 uncacheAddr = 0x800000;
161
162 // set up counters
163 noResponseCycles = 0;
164 numReads = 0;
165 schedule(tickEvent, 0);
166
167 accessRetry = false;
168 dmaOutstanding = false;
169}
170
171Port *
172MemTest::getPort(const std::string &if_name, int idx)

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196MemTest::completeRequest(PacketPtr pkt)
197{
198 Request *req = pkt->req;
199
200 if (issueDmas) {
201 dmaOutstanding = false;
202 }
203
204 DPRINTF(MemTest, "completing %s at address %x (blk %x)\n",
205 pkt->isWrite() ? "write" : "read",
206 req->getPaddr(), blockAddr(req->getPaddr()));
207
208 MemTestSenderState *state =
209 dynamic_cast<MemTestSenderState *>(pkt->senderState);
210
211 uint8_t *data = state->data;
212 uint8_t *pkt_data = pkt->getPtr<uint8_t>();
213
214 //Remove the address from the list of outstanding
215 std::set<unsigned>::iterator removeAddr =
216 outstandingAddrs.find(req->getPaddr());
217 assert(removeAddr != outstandingAddrs.end());
218 outstandingAddrs.erase(removeAddr);
219
220 if (pkt->isRead()) {
221 if (memcmp(pkt_data, data, pkt->getSize()) != 0) {
222 panic("%s: read of %x (blk %x) @ cycle %d "
223 "returns %x, expected %x\n", name(),
224 req->getPaddr(), blockAddr(req->getPaddr()), curTick(),
225 *pkt_data, *data);
226 }
227
228 numReads++;
229 numReadsStat++;
230
231 if (numReads == (uint64_t)nextProgressMessage) {
232 ccprintf(cerr, "%s: completed %d read accesses @%d\n",
233 name(), numReads, curTick());
234 nextProgressMessage += progressInterval;
235 }
236
237 if (maxLoads != 0 && numReads >= maxLoads)
238 exitSimLoop("maximum number of loads reached");
239 } else {
240 assert(pkt->isWrite());
241 numWritesStat++;
242 }
243
244 noResponseCycles = 0;
245 delete state;
246 delete [] data;
247 delete pkt->req;
248 delete pkt;
249}

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356
357 PacketPtr pkt = new Packet(req, MemCmd::ReadReq, Packet::Broadcast);
358 pkt->setSrc(0);
359 pkt->dataDynamicArray(new uint8_t[req->getSize()]);
360 MemTestSenderState *state = new MemTestSenderState(result);
361 pkt->senderState = state;
362
363 if (do_functional) {
364 cachePort.sendFunctional(pkt);
365 completeRequest(pkt);
366 } else {
367 sendPkt(pkt);
368 }
369 } else {
370 // write
371

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387 PacketPtr pkt = new Packet(req, MemCmd::WriteReq, Packet::Broadcast);
388 pkt->setSrc(0);
389 uint8_t *pkt_data = new uint8_t[req->getSize()];
390 pkt->dataDynamicArray(pkt_data);
391 memcpy(pkt_data, &data, req->getSize());
392 MemTestSenderState *state = new MemTestSenderState(result);
393 pkt->senderState = state;
394
395 funcPort.writeBlob(req->getPaddr(), pkt_data, req->getSize());
396
397 if (do_functional) {
398 cachePort.sendFunctional(pkt);
399 completeRequest(pkt);
400 } else {
401 sendPkt(pkt);
402 }
403 }
404}
405

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