InvalidateGenerator.cc (8949:3fa1ee293096) InvalidateGenerator.cc (8950:a6830d615eff)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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47
48InvalidateGenerator::~InvalidateGenerator()
49{
50}
51
52bool
53InvalidateGenerator::initiate()
54{
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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47
48InvalidateGenerator::~InvalidateGenerator()
49{
50}
51
52bool
53InvalidateGenerator::initiate()
54{
55 RubyDirectedTester::CpuPort* port;
55 MasterPort* port;
56 Request::Flags flags;
57 PacketPtr pkt;
58 Packet::Command cmd;
59
60 // For simplicity, requests are assumed to be 1 byte-sized
61 Request *req = new Request(m_address, 1, flags, masterId);
62
63 //
64 // Based on the current state, issue a load or a store
65 //
66 if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
67 DPRINTF(DirectedTest, "initiating read\n");
68 cmd = MemCmd::ReadReq;
56 Request::Flags flags;
57 PacketPtr pkt;
58 Packet::Command cmd;
59
60 // For simplicity, requests are assumed to be 1 byte-sized
61 Request *req = new Request(m_address, 1, flags, masterId);
62
63 //
64 // Based on the current state, issue a load or a store
65 //
66 if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
67 DPRINTF(DirectedTest, "initiating read\n");
68 cmd = MemCmd::ReadReq;
69 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
70 getCpuPort(m_active_read_node));
69 port = m_directed_tester->getCpuPort(m_active_read_node);
71 pkt = new Packet(req, cmd);
72 } else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) {
73 DPRINTF(DirectedTest, "initiating invalidating write\n");
74 cmd = MemCmd::WriteReq;
70 pkt = new Packet(req, cmd);
71 } else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) {
72 DPRINTF(DirectedTest, "initiating invalidating write\n");
73 cmd = MemCmd::WriteReq;
75 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
76 getCpuPort(m_active_inv_node));
74 port = m_directed_tester->getCpuPort(m_active_inv_node);
77 pkt = new Packet(req, cmd);
78 } else {
79 panic("initiate was unexpectedly called\n");
80 }
81 uint8_t* dummyData = new uint8_t;
82 *dummyData = 0;
83 pkt->dataDynamic(dummyData);
84

--- 59 unchanged lines hidden --- 		75 pkt = new Packet(req, cmd);
76 } else {
77 panic("initiate was unexpectedly called\n");
78 }
79 uint8_t* dummyData = new uint8_t;
80 *dummyData = 0;
81 pkt->dataDynamic(dummyData);
82

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