InvalidateGenerator.cc (8832:247fee427324) InvalidateGenerator.cc (8949:3fa1ee293096)
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 54 unchanged lines hidden (view full) ---

63 //
64 // Based on the current state, issue a load or a store
65 //
66 if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
67 DPRINTF(DirectedTest, "initiating read\n");
68 cmd = MemCmd::ReadReq;
69 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
70 getCpuPort(m_active_read_node));
1/*
2 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
3 * Copyright (c) 2009-2010 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 54 unchanged lines hidden (view full) ---

63 //
64 // Based on the current state, issue a load or a store
65 //
66 if (m_status == InvalidateGeneratorStatus_Load_Waiting) {
67 DPRINTF(DirectedTest, "initiating read\n");
68 cmd = MemCmd::ReadReq;
69 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
70 getCpuPort(m_active_read_node));
71 pkt = new Packet(req, cmd, m_active_read_node);
71 pkt = new Packet(req, cmd);
72 } else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) {
73 DPRINTF(DirectedTest, "initiating invalidating write\n");
74 cmd = MemCmd::WriteReq;
75 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
76 getCpuPort(m_active_inv_node));
72 } else if (m_status == InvalidateGeneratorStatus_Inv_Waiting) {
73 DPRINTF(DirectedTest, "initiating invalidating write\n");
74 cmd = MemCmd::WriteReq;
75 port = safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester->
76 getCpuPort(m_active_inv_node));
77 pkt = new Packet(req, cmd, m_active_inv_node);
77 pkt = new Packet(req, cmd);
78 } else {
79 panic("initiate was unexpectedly called\n");
80 }
81 uint8_t* dummyData = new uint8_t;
82 *dummyData = 0;
83 pkt->dataDynamic(dummyData);
84
85 if (port->sendTiming(pkt)) {

--- 58 unchanged lines hidden ---
78 } else {
79 panic("initiate was unexpectedly called\n");
80 }
81 uint8_t* dummyData = new uint8_t;
82 *dummyData = 0;
83 pkt->dataDynamic(dummyData);
84
85 if (port->sendTiming(pkt)) {

--- 58 unchanged lines hidden ---