static_inst.hh (9848:a733a8eb6363) static_inst.hh (9920:028e4da64b42)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the

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105 /// model we should be able to get rid of these flags and
106 /// implement this behavior via the execute() methods.
107 ///
108 enum Flags {
109 IsNop, ///< Is a no-op (no effect at all).
110
111 IsInteger, ///< References integer regs.
112 IsFloating, ///< References FP regs.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the

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106 /// model we should be able to get rid of these flags and
107 /// implement this behavior via the execute() methods.
108 ///
109 enum Flags {
110 IsNop, ///< Is a no-op (no effect at all).
111
112 IsInteger, ///< References integer regs.
113 IsFloating, ///< References FP regs.
114 IsCC, ///< References CC regs.
113
114 IsMemRef, ///< References memory (load, store, or prefetch).
115 IsLoad, ///< Reads from memory (load or prefetch).
116 IsStore, ///< Writes to memory.
117 IsStoreConditional, ///< Store conditional instruction.
118 IsIndexed, ///< Accesses memory with an indexed address computation
119 IsInstPrefetch, ///< Instruction-cache prefetch.
120 IsDataPrefetch, ///< Data-cache prefetch.

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176 /// See numDestRegs().
177 int8_t _numDestRegs;
178
179 /// The following are used to track physical register usage
180 /// for machines with separate int & FP reg files.
181 //@{
182 int8_t _numFPDestRegs;
183 int8_t _numIntDestRegs;
115
116 IsMemRef, ///< References memory (load, store, or prefetch).
117 IsLoad, ///< Reads from memory (load or prefetch).
118 IsStore, ///< Writes to memory.
119 IsStoreConditional, ///< Store conditional instruction.
120 IsIndexed, ///< Accesses memory with an indexed address computation
121 IsInstPrefetch, ///< Instruction-cache prefetch.
122 IsDataPrefetch, ///< Data-cache prefetch.

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178 /// See numDestRegs().
179 int8_t _numDestRegs;
180
181 /// The following are used to track physical register usage
182 /// for machines with separate int & FP reg files.
183 //@{
184 int8_t _numFPDestRegs;
185 int8_t _numIntDestRegs;
186 int8_t _numCCDestRegs;
184 //@}
185
186 public:
187
188 /// @name Register information.
189 /// The sum of numFPDestRegs() and numIntDestRegs() equals
190 /// numDestRegs(). The former two functions are used to track
191 /// physical register usage for machines with separate int & FP

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215 bool isStoreConditional() const { return flags[IsStoreConditional]; }
216 bool isInstPrefetch() const { return flags[IsInstPrefetch]; }
217 bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
218 bool isPrefetch() const { return isInstPrefetch() ||
219 isDataPrefetch(); }
220
221 bool isInteger() const { return flags[IsInteger]; }
222 bool isFloating() const { return flags[IsFloating]; }
187 //@}
188
189 public:
190
191 /// @name Register information.
192 /// The sum of numFPDestRegs() and numIntDestRegs() equals
193 /// numDestRegs(). The former two functions are used to track
194 /// physical register usage for machines with separate int & FP

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218 bool isStoreConditional() const { return flags[IsStoreConditional]; }
219 bool isInstPrefetch() const { return flags[IsInstPrefetch]; }
220 bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
221 bool isPrefetch() const { return isInstPrefetch() ||
222 isDataPrefetch(); }
223
224 bool isInteger() const { return flags[IsInteger]; }
225 bool isFloating() const { return flags[IsFloating]; }
226 bool isCC() const { return flags[IsCC]; }
223
224 bool isControl() const { return flags[IsControl]; }
225 bool isCall() const { return flags[IsCall]; }
226 bool isReturn() const { return flags[IsReturn]; }
227 bool isDirectCtrl() const { return flags[IsDirectControl]; }
228 bool isIndirectCtrl() const { return flags[IsIndirectControl]; }
229 bool isCondCtrl() const { return flags[IsCondControl]; }
230 bool isUncondCtrl() const { return flags[IsUncondControl]; }

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228 bool isControl() const { return flags[IsControl]; }
229 bool isCall() const { return flags[IsCall]; }
230 bool isReturn() const { return flags[IsReturn]; }
231 bool isDirectCtrl() const { return flags[IsDirectControl]; }
232 bool isIndirectCtrl() const { return flags[IsIndirectControl]; }
233 bool isCondCtrl() const { return flags[IsCondControl]; }
234 bool isUncondCtrl() const { return flags[IsUncondControl]; }

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