static_inst.hh (5036:f9174c026b7f) static_inst.hh (5222:bb733a878f85)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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109
110 IsInteger, ///< References integer regs.
111 IsFloating, ///< References FP regs.
112
113 IsMemRef, ///< References memory (load, store, or prefetch).
114 IsLoad, ///< Reads from memory (load or prefetch).
115 IsStore, ///< Writes to memory.
116 IsStoreConditional, ///< Store conditional instruction.
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 100 unchanged lines hidden (view full) ---

109
110 IsInteger, ///< References integer regs.
111 IsFloating, ///< References FP regs.
112
113 IsMemRef, ///< References memory (load, store, or prefetch).
114 IsLoad, ///< Reads from memory (load or prefetch).
115 IsStore, ///< Writes to memory.
116 IsStoreConditional, ///< Store conditional instruction.
117 IsIndexed, ///< Accesses memory with an indexed address computation
117 IsInstPrefetch, ///< Instruction-cache prefetch.
118 IsDataPrefetch, ///< Data-cache prefetch.
119 IsCopy, ///< Fast Cache block copy
120
121 IsControl, ///< Control transfer instruction.
122 IsDirectControl, ///< PC relative control transfer.
123 IsIndirectControl, ///< Register indirect control transfer.
124 IsCondControl, ///< Conditional control transfer.

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131 IsThreadSync, ///< Thread synchronization operation.
132
133 IsSerializing, ///< Serializes pipeline: won't execute until all
134 /// older instructions have committed.
135 IsSerializeBefore,
136 IsSerializeAfter,
137 IsMemBarrier, ///< Is a memory barrier
138 IsWriteBarrier, ///< Is a write barrier
118 IsInstPrefetch, ///< Instruction-cache prefetch.
119 IsDataPrefetch, ///< Data-cache prefetch.
120 IsCopy, ///< Fast Cache block copy
121
122 IsControl, ///< Control transfer instruction.
123 IsDirectControl, ///< PC relative control transfer.
124 IsIndirectControl, ///< Register indirect control transfer.
125 IsCondControl, ///< Conditional control transfer.

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132 IsThreadSync, ///< Thread synchronization operation.
133
134 IsSerializing, ///< Serializes pipeline: won't execute until all
135 /// older instructions have committed.
136 IsSerializeBefore,
137 IsSerializeAfter,
138 IsMemBarrier, ///< Is a memory barrier
139 IsWriteBarrier, ///< Is a write barrier
140 IsERET, /// <- Causes the IFU to stall (MIPS ISA)
139
140 IsNonSpeculative, ///< Should not be executed speculatively
141 IsQuiesce, ///< Is a quiesce instruction
142
143 IsIprAccess, ///< Accesses IPRs
144 IsUnverifiable, ///< Can't be verified by a checker
145
146 IsSyscall, ///< Causes a system call to be emulated in syscall
147 /// emulation mode.
148
149 //Flags for microcode
150 IsMacroop, ///< Is a macroop containing microops
151 IsMicroop, ///< Is a microop
152 IsDelayedCommit, ///< This microop doesn't commit right away
153 IsLastMicroop, ///< This microop ends a microop sequence
154 IsFirstMicroop, ///< This microop begins a microop sequence
155 //This flag doesn't do anything yet
156 IsMicroBranch, ///< This microop branches within the microcode for a macroop
141
142 IsNonSpeculative, ///< Should not be executed speculatively
143 IsQuiesce, ///< Is a quiesce instruction
144
145 IsIprAccess, ///< Accesses IPRs
146 IsUnverifiable, ///< Can't be verified by a checker
147
148 IsSyscall, ///< Causes a system call to be emulated in syscall
149 /// emulation mode.
150
151 //Flags for microcode
152 IsMacroop, ///< Is a macroop containing microops
153 IsMicroop, ///< Is a microop
154 IsDelayedCommit, ///< This microop doesn't commit right away
155 IsLastMicroop, ///< This microop ends a microop sequence
156 IsFirstMicroop, ///< This microop begins a microop sequence
157 //This flag doesn't do anything yet
158 IsMicroBranch, ///< This microop branches within the microcode for a macroop
159 IsDspOp,
157
158 NumFlags
159 };
160
161 /// Flag values for this instruction.
162 std::bitset<NumFlags> flags;
163
164 /// See opClass().

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161 NumFlags
162 };
163
164 /// Flag values for this instruction.
165 std::bitset<NumFlags> flags;
166
167 /// See opClass().

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