static_inst.hh (12857:6fc1b2a47d76) static_inst.hh (13610:5d5404ac6288)
1/*
1/*
2 * Copyright (c) 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

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100 int8_t _numIntDestRegs;
101 int8_t _numCCDestRegs;
102 //@}
103
104 /** To use in architectures with vector register file. */
105 /** @{ */
106 int8_t _numVecDestRegs;
107 int8_t _numVecElemDestRegs;
14 * Copyright (c) 2003-2005 The Regents of The University of Michigan
15 * Copyright (c) 2013 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;

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112 int8_t _numIntDestRegs;
113 int8_t _numCCDestRegs;
114 //@}
115
116 /** To use in architectures with vector register file. */
117 /** @{ */
118 int8_t _numVecDestRegs;
119 int8_t _numVecElemDestRegs;
120 int8_t _numVecPredDestRegs;
108 /** @} */
109
110 public:
111
112 /// @name Register information.
121 /** @} */
122
123 public:
124
125 /// @name Register information.
113 /// The sum of numFPDestRegs(), numIntDestRegs(), numVecDestRegs() and
114 /// numVecelemDestRegs() equals numDestRegs(). The former two functions
115 /// are used to track physical register usage for machines with separate
116 /// int & FP reg files, the next two is for machines with vector register
117 /// file.
126 /// The sum of numFPDestRegs(), numIntDestRegs(), numVecDestRegs(),
127 /// numVecElemDestRegs() and numVecPredDestRegs() equals numDestRegs().
128 /// The former two functions are used to track physical register usage for
129 /// machines with separate int & FP reg files, the next three are for
130 /// machines with vector and predicate register files.
118 //@{
119 /// Number of source registers.
120 int8_t numSrcRegs() const { return _numSrcRegs; }
121 /// Number of destination registers.
122 int8_t numDestRegs() const { return _numDestRegs; }
123 /// Number of floating-point destination regs.
124 int8_t numFPDestRegs() const { return _numFPDestRegs; }
125 /// Number of integer destination regs.
126 int8_t numIntDestRegs() const { return _numIntDestRegs; }
127 /// Number of vector destination regs.
128 int8_t numVecDestRegs() const { return _numVecDestRegs; }
129 /// Number of vector element destination regs.
130 int8_t numVecElemDestRegs() const { return _numVecElemDestRegs; }
131 //@{
132 /// Number of source registers.
133 int8_t numSrcRegs() const { return _numSrcRegs; }
134 /// Number of destination registers.
135 int8_t numDestRegs() const { return _numDestRegs; }
136 /// Number of floating-point destination regs.
137 int8_t numFPDestRegs() const { return _numFPDestRegs; }
138 /// Number of integer destination regs.
139 int8_t numIntDestRegs() const { return _numIntDestRegs; }
140 /// Number of vector destination regs.
141 int8_t numVecDestRegs() const { return _numVecDestRegs; }
142 /// Number of vector element destination regs.
143 int8_t numVecElemDestRegs() const { return _numVecElemDestRegs; }
144 /// Number of predicate destination regs.
145 int8_t numVecPredDestRegs() const { return _numVecPredDestRegs; }
131 /// Number of coprocesor destination regs.
132 int8_t numCCDestRegs() const { return _numCCDestRegs; }
133 //@}
134
135 /// @name Flag accessors.
136 /// These functions are used to access the values of the various
137 /// instruction property flags. See StaticInst::Flags for descriptions
138 /// of the individual flags.

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243 /// Constructor.
244 /// It's important to initialize everything here to a sane
245 /// default, since the decoder generally only overrides
246 /// the fields that are meaningful for the particular
247 /// instruction.
248 StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
249 : _opClass(__opClass), _numSrcRegs(0), _numDestRegs(0),
250 _numFPDestRegs(0), _numIntDestRegs(0), _numCCDestRegs(0),
146 /// Number of coprocesor destination regs.
147 int8_t numCCDestRegs() const { return _numCCDestRegs; }
148 //@}
149
150 /// @name Flag accessors.
151 /// These functions are used to access the values of the various
152 /// instruction property flags. See StaticInst::Flags for descriptions
153 /// of the individual flags.

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258 /// Constructor.
259 /// It's important to initialize everything here to a sane
260 /// default, since the decoder generally only overrides
261 /// the fields that are meaningful for the particular
262 /// instruction.
263 StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
264 : _opClass(__opClass), _numSrcRegs(0), _numDestRegs(0),
265 _numFPDestRegs(0), _numIntDestRegs(0), _numCCDestRegs(0),
251 _numVecDestRegs(0), _numVecElemDestRegs(0), machInst(_machInst),
252 mnemonic(_mnemonic), cachedDisassembly(0)
266 _numVecDestRegs(0), _numVecElemDestRegs(0), _numVecPredDestRegs(0),
267 machInst(_machInst), mnemonic(_mnemonic), cachedDisassembly(0)
253 { }
254
255 public:
256 virtual ~StaticInst();
257
258 virtual Fault execute(ExecContext *xc,
259 Trace::InstRecord *traceData) const = 0;
260

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269
270 public:
271 virtual ~StaticInst();
272
273 virtual Fault execute(ExecContext *xc,
274 Trace::InstRecord *traceData) const = 0;
275

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