static_inst.hh (10201:30a20d2072c1) static_inst.hh (10259:ebb376f73dd2)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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54template <class Impl> class BaseO3DynInst;
55typedef BaseO3DynInst<O3CPUImpl> O3DynInst;
56class InOrderDynInst;
57
58class CheckerCPU;
59class AtomicSimpleCPU;
60class TimingSimpleCPU;
61class InorderCPU;
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 45 unchanged lines hidden (view full) ---

54template <class Impl> class BaseO3DynInst;
55typedef BaseO3DynInst<O3CPUImpl> O3DynInst;
56class InOrderDynInst;
57
58class CheckerCPU;
59class AtomicSimpleCPU;
60class TimingSimpleCPU;
61class InorderCPU;
62namespace Minor
63{
64 class ExecContext;
65};
66
62class SymbolTable;
63
64namespace Trace {
65 class InstRecord;
66}
67
68/**
69 * Base, ISA-independent static instruction class.

--- 253 unchanged lines hidden --- 		67class SymbolTable;
68
69namespace Trace {
70 class InstRecord;
71}
72
73/**
74 * Base, ISA-independent static instruction class.

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