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> * Copyright (c) 2017 ARM Limited
> * All rights reserved
> *
> * The license below extends only to copyright in the software and shall
> * not be construed as granting a license to any other intellectual
> * property including but not limited to intellectual property relating
> * to a hardware implementation of the functionality of the software
> * licensed hereunder. You may use the software subject to the license
> * terms below provided that you ensure that this notice is replicated
> * unmodified and in its entirety in all distributions of the software,
> * modified or unmodified, in source code or in binary form.
> *
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> int8_t _numVecPredDestRegs;
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< /// The sum of numFPDestRegs(), numIntDestRegs(), numVecDestRegs() and
< /// numVecelemDestRegs() equals numDestRegs(). The former two functions
< /// are used to track physical register usage for machines with separate
< /// int & FP reg files, the next two is for machines with vector register
< /// file.
---
> /// The sum of numFPDestRegs(), numIntDestRegs(), numVecDestRegs(),
> /// numVecElemDestRegs() and numVecPredDestRegs() equals numDestRegs().
> /// The former two functions are used to track physical register usage for
> /// machines with separate int & FP reg files, the next three are for
> /// machines with vector and predicate register files.
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> /// Number of predicate destination regs.
> int8_t numVecPredDestRegs() const { return _numVecPredDestRegs; }
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< _numVecDestRegs(0), _numVecElemDestRegs(0), machInst(_machInst),
< mnemonic(_mnemonic), cachedDisassembly(0)
---
> _numVecDestRegs(0), _numVecElemDestRegs(0), _numVecPredDestRegs(0),
> machInst(_machInst), mnemonic(_mnemonic), cachedDisassembly(0)