1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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37#include "arch/isa_traits.hh"
38#include "arch/utility.hh"
39#include "sim/faults.hh"
40#include "base/bitfield.hh"
41#include "base/hashmap.hh"
42#include "base/misc.hh"
43#include "base/refcnt.hh"
44#include "cpu/op_class.hh"
45#include "cpu/o3/dyn_inst_decl.hh"
46#include "sim/faults.hh"
47#include "sim/host.hh"
48
49// forward declarations
50struct AlphaSimpleImpl;
51struct OzoneImpl;
52struct SimpleImpl;
53class ThreadContext;
54class DynInst;
55class Packet;
56
57template <class Impl>
58class OzoneDynInst;
59
60class CheckerCPU;
61class FastCPU;
62class AtomicSimpleCPU;
63class TimingSimpleCPU;
64class InorderCPU;

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