simple_thread.hh (7597:063f160e8b50) | simple_thread.hh (7601:bf0aa77f8908) |
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1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 254 unchanged lines hidden (view full) --- 263 // 264 // New accessors for new decoder. 265 // 266 uint64_t readIntReg(int reg_idx) 267 { 268 int flatIndex = isa.flattenIntIndex(reg_idx); 269 assert(flatIndex < TheISA::NumIntRegs); 270 uint64_t regVal = intRegs[flatIndex]; | 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 254 unchanged lines hidden (view full) --- 263 // 264 // New accessors for new decoder. 265 // 266 uint64_t readIntReg(int reg_idx) 267 { 268 int flatIndex = isa.flattenIntIndex(reg_idx); 269 assert(flatIndex < TheISA::NumIntRegs); 270 uint64_t regVal = intRegs[flatIndex]; |
271 DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", reg_idx, regVal); | 271 DPRINTF(IntRegs, "Reading int reg %d (%d) as %#x.\n", 272 reg_idx, flatIndex, regVal); |
272 return regVal; 273 } 274 275 FloatReg readFloatReg(int reg_idx) 276 { 277 int flatIndex = isa.flattenFloatIndex(reg_idx); 278 assert(flatIndex < TheISA::NumFloatRegs); 279 FloatReg regVal = floatRegs.f[flatIndex]; | 273 return regVal; 274 } 275 276 FloatReg readFloatReg(int reg_idx) 277 { 278 int flatIndex = isa.flattenFloatIndex(reg_idx); 279 assert(flatIndex < TheISA::NumFloatRegs); 280 FloatReg regVal = floatRegs.f[flatIndex]; |
280 DPRINTF(FloatRegs, "Reading float reg %d as %f, %#x.\n", 281 reg_idx, regVal, floatRegs.i[flatIndex]); | 281 DPRINTF(FloatRegs, "Reading float reg %d (%d) as %f, %#x.\n", 282 reg_idx, flatIndex, regVal, floatRegs.i[flatIndex]); |
282 return regVal; 283 } 284 285 FloatRegBits readFloatRegBits(int reg_idx) 286 { 287 int flatIndex = isa.flattenFloatIndex(reg_idx); 288 assert(flatIndex < TheISA::NumFloatRegs); 289 FloatRegBits regVal = floatRegs.i[flatIndex]; | 283 return regVal; 284 } 285 286 FloatRegBits readFloatRegBits(int reg_idx) 287 { 288 int flatIndex = isa.flattenFloatIndex(reg_idx); 289 assert(flatIndex < TheISA::NumFloatRegs); 290 FloatRegBits regVal = floatRegs.i[flatIndex]; |
290 DPRINTF(FloatRegs, "Reading float reg %d bits as %#x, %f.\n", 291 reg_idx, regVal, floatRegs.f[flatIndex]); | 291 DPRINTF(FloatRegs, "Reading float reg %d (%d) bits as %#x, %f.\n", 292 reg_idx, flatIndex, regVal, floatRegs.f[flatIndex]); |
292 return regVal; 293 } 294 295 void setIntReg(int reg_idx, uint64_t val) 296 { 297 int flatIndex = isa.flattenIntIndex(reg_idx); 298 assert(flatIndex < TheISA::NumIntRegs); | 293 return regVal; 294 } 295 296 void setIntReg(int reg_idx, uint64_t val) 297 { 298 int flatIndex = isa.flattenIntIndex(reg_idx); 299 assert(flatIndex < TheISA::NumIntRegs); |
299 DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", reg_idx, val); | 300 DPRINTF(IntRegs, "Setting int reg %d (%d) to %#x.\n", 301 reg_idx, flatIndex, val); |
300 intRegs[flatIndex] = val; 301 } 302 303 void setFloatReg(int reg_idx, FloatReg val) 304 { 305 int flatIndex = isa.flattenFloatIndex(reg_idx); 306 assert(flatIndex < TheISA::NumFloatRegs); 307 floatRegs.f[flatIndex] = val; | 302 intRegs[flatIndex] = val; 303 } 304 305 void setFloatReg(int reg_idx, FloatReg val) 306 { 307 int flatIndex = isa.flattenFloatIndex(reg_idx); 308 assert(flatIndex < TheISA::NumFloatRegs); 309 floatRegs.f[flatIndex] = val; |
308 DPRINTF(FloatRegs, "Setting float reg %d to %f, %#x.\n", 309 reg_idx, val, floatRegs.i[flatIndex]); | 310 DPRINTF(FloatRegs, "Setting float reg %d (%d) to %f, %#x.\n", 311 reg_idx, flatIndex, val, floatRegs.i[flatIndex]); |
310 } 311 312 void setFloatRegBits(int reg_idx, FloatRegBits val) 313 { 314 int flatIndex = isa.flattenFloatIndex(reg_idx); 315 assert(flatIndex < TheISA::NumFloatRegs); 316 floatRegs.i[flatIndex] = val; | 312 } 313 314 void setFloatRegBits(int reg_idx, FloatRegBits val) 315 { 316 int flatIndex = isa.flattenFloatIndex(reg_idx); 317 assert(flatIndex < TheISA::NumFloatRegs); 318 floatRegs.i[flatIndex] = val; |
317 DPRINTF(FloatRegs, "Setting float reg %d bits to %#x, %#f.\n", 318 reg_idx, val, floatRegs.f[flatIndex]); | 319 DPRINTF(FloatRegs, "Setting float reg %d (%d) bits to %#x, %#f.\n", 320 reg_idx, flatIndex, val, floatRegs.f[flatIndex]); |
319 } 320 321 uint64_t readPC() 322 { 323 return PC; 324 } 325 326 void setPC(uint64_t val) --- 118 unchanged lines hidden --- | 321 } 322 323 uint64_t readPC() 324 { 325 return PC; 326 } 327 328 void setPC(uint64_t val) --- 118 unchanged lines hidden --- |