simple_thread.hh (6658:f4de76601762) | simple_thread.hh (7341:95404ec156de) |
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1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 258 unchanged lines hidden (view full) --- 267 DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", reg_idx, regVal); 268 return regVal; 269 } 270 271 FloatReg readFloatReg(int reg_idx) 272 { 273 int flatIndex = isa.flattenFloatIndex(reg_idx); 274 assert(flatIndex < TheISA::NumFloatRegs); | 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 258 unchanged lines hidden (view full) --- 267 DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", reg_idx, regVal); 268 return regVal; 269 } 270 271 FloatReg readFloatReg(int reg_idx) 272 { 273 int flatIndex = isa.flattenFloatIndex(reg_idx); 274 assert(flatIndex < TheISA::NumFloatRegs); |
275 return floatRegs.f[flatIndex]; | 275 FloatReg regVal = floatRegs.f[flatIndex]; 276 DPRINTF(FloatRegs, "Reading float reg %d as %f, %#x.\n", 277 reg_idx, regVal, floatRegs.i[flatIndex]); 278 return regVal; |
276 } 277 278 FloatRegBits readFloatRegBits(int reg_idx) 279 { 280 int flatIndex = isa.flattenFloatIndex(reg_idx); 281 assert(flatIndex < TheISA::NumFloatRegs); | 279 } 280 281 FloatRegBits readFloatRegBits(int reg_idx) 282 { 283 int flatIndex = isa.flattenFloatIndex(reg_idx); 284 assert(flatIndex < TheISA::NumFloatRegs); |
282 return floatRegs.i[flatIndex]; | 285 FloatRegBits regVal = floatRegs.i[flatIndex]; 286 DPRINTF(FloatRegs, "Reading float reg %d bits as %#x, %f.\n", 287 reg_idx, regVal, floatRegs.f[flatIndex]); 288 return regVal; |
283 } 284 285 void setIntReg(int reg_idx, uint64_t val) 286 { 287 int flatIndex = isa.flattenIntIndex(reg_idx); 288 assert(flatIndex < TheISA::NumIntRegs); 289 DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", reg_idx, val); 290 intRegs[flatIndex] = val; 291 } 292 293 void setFloatReg(int reg_idx, FloatReg val) 294 { 295 int flatIndex = isa.flattenFloatIndex(reg_idx); 296 assert(flatIndex < TheISA::NumFloatRegs); 297 floatRegs.f[flatIndex] = val; | 289 } 290 291 void setIntReg(int reg_idx, uint64_t val) 292 { 293 int flatIndex = isa.flattenIntIndex(reg_idx); 294 assert(flatIndex < TheISA::NumIntRegs); 295 DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", reg_idx, val); 296 intRegs[flatIndex] = val; 297 } 298 299 void setFloatReg(int reg_idx, FloatReg val) 300 { 301 int flatIndex = isa.flattenFloatIndex(reg_idx); 302 assert(flatIndex < TheISA::NumFloatRegs); 303 floatRegs.f[flatIndex] = val; |
304 DPRINTF(FloatRegs, "Setting float reg %d to %f, %#x.\n", 305 reg_idx, val, floatRegs.i[flatIndex]); |
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298 } 299 300 void setFloatRegBits(int reg_idx, FloatRegBits val) 301 { 302 int flatIndex = isa.flattenFloatIndex(reg_idx); 303 assert(flatIndex < TheISA::NumFloatRegs); 304 floatRegs.i[flatIndex] = val; | 306 } 307 308 void setFloatRegBits(int reg_idx, FloatRegBits val) 309 { 310 int flatIndex = isa.flattenFloatIndex(reg_idx); 311 assert(flatIndex < TheISA::NumFloatRegs); 312 floatRegs.i[flatIndex] = val; |
313 DPRINTF(FloatRegs, "Setting float reg %d bits to %#x, %#f.\n", 314 reg_idx, val, floatRegs.f[flatIndex]); |
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305 } 306 307 uint64_t readPC() 308 { 309 return PC; 310 } 311 312 void setPC(uint64_t val) --- 108 unchanged lines hidden --- | 315 } 316 317 uint64_t readPC() 318 { 319 return PC; 320 } 321 322 void setPC(uint64_t val) --- 108 unchanged lines hidden --- |