simple_thread.hh (6314:781969fbeca9) simple_thread.hh (6315:c7295a4826d5)
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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94 typedef TheISA::MiscReg MiscReg;
95 typedef TheISA::FloatReg FloatReg;
96 typedef TheISA::FloatRegBits FloatRegBits;
97 public:
98 typedef ThreadContext::Status Status;
99
100 protected:
101 RegFile regs; // correct-path register context
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 85 unchanged lines hidden (view full) ---

94 typedef TheISA::MiscReg MiscReg;
95 typedef TheISA::FloatReg FloatReg;
96 typedef TheISA::FloatRegBits FloatRegBits;
97 public:
98 typedef ThreadContext::Status Status;
99
100 protected:
101 RegFile regs; // correct-path register context
102 union {
103 FloatReg f[TheISA::NumFloatRegs];
104 FloatRegBits i[TheISA::NumFloatRegs];
105 } floatRegs;
102 TheISA::ISA isa; // one "instance" of the current ISA.
103
104 public:
105 // pointer to CPU associated with this SimpleThread
106 BaseCPU *cpu;
107
108 ProxyThreadContext<SimpleThread> *tc;
109

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218 {
219 panic("instRead not implemented");
220 // return funcPhysMem->read(req, inst);
221 return NoFault;
222 }
223
224 void copyArchRegs(ThreadContext *tc);
225
106 TheISA::ISA isa; // one "instance" of the current ISA.
107
108 public:
109 // pointer to CPU associated with this SimpleThread
110 BaseCPU *cpu;
111
112 ProxyThreadContext<SimpleThread> *tc;
113

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222 {
223 panic("instRead not implemented");
224 // return funcPhysMem->read(req, inst);
225 return NoFault;
226 }
227
228 void copyArchRegs(ThreadContext *tc);
229
226 void clearArchRegs() { regs.clear(); }
230 void clearArchRegs()
231 {
232 regs.clear();
233 memset(floatRegs.i, 0, sizeof(floatRegs.i));
234 }
227
228 //
229 // New accessors for new decoder.
230 //
231 uint64_t readIntReg(int reg_idx)
232 {
233 int flatIndex = isa.flattenIntIndex(reg_idx);
234 return regs.readIntReg(flatIndex);
235 }
236
237 FloatReg readFloatReg(int reg_idx)
238 {
239 int flatIndex = isa.flattenFloatIndex(reg_idx);
235
236 //
237 // New accessors for new decoder.
238 //
239 uint64_t readIntReg(int reg_idx)
240 {
241 int flatIndex = isa.flattenIntIndex(reg_idx);
242 return regs.readIntReg(flatIndex);
243 }
244
245 FloatReg readFloatReg(int reg_idx)
246 {
247 int flatIndex = isa.flattenFloatIndex(reg_idx);
240 return regs.readFloatReg(flatIndex);
248 return floatRegs.f[flatIndex];
241 }
242
243 FloatRegBits readFloatRegBits(int reg_idx)
244 {
245 int flatIndex = isa.flattenFloatIndex(reg_idx);
249 }
250
251 FloatRegBits readFloatRegBits(int reg_idx)
252 {
253 int flatIndex = isa.flattenFloatIndex(reg_idx);
246 return regs.readFloatRegBits(flatIndex);
254 return floatRegs.i[flatIndex];
247 }
248
249 void setIntReg(int reg_idx, uint64_t val)
250 {
251 int flatIndex = isa.flattenIntIndex(reg_idx);
252 regs.setIntReg(flatIndex, val);
253 }
254
255 void setFloatReg(int reg_idx, FloatReg val)
256 {
257 int flatIndex = isa.flattenFloatIndex(reg_idx);
255 }
256
257 void setIntReg(int reg_idx, uint64_t val)
258 {
259 int flatIndex = isa.flattenIntIndex(reg_idx);
260 regs.setIntReg(flatIndex, val);
261 }
262
263 void setFloatReg(int reg_idx, FloatReg val)
264 {
265 int flatIndex = isa.flattenFloatIndex(reg_idx);
258 regs.setFloatReg(flatIndex, val);
266 floatRegs.f[flatIndex] = val;
259 }
260
261 void setFloatRegBits(int reg_idx, FloatRegBits val)
262 {
263 int flatIndex = isa.flattenFloatIndex(reg_idx);
267 }
268
269 void setFloatRegBits(int reg_idx, FloatRegBits val)
270 {
271 int flatIndex = isa.flattenFloatIndex(reg_idx);
264 regs.setFloatRegBits(flatIndex, val);
272 floatRegs.i[flatIndex] = val;
265 }
266
267 uint64_t readPC()
268 {
269 return regs.readPC();
270 }
271
272 void setPC(uint64_t val)

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274
275 uint64_t readPC()
276 {
277 return regs.readPC();
278 }
279
280 void setPC(uint64_t val)

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