simple_thread.hh (4488:400afb0dd42d) simple_thread.hh (4661:44458219add1)
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 335 unchanged lines hidden (view full) ---

344 return regs.readNextNPC();
345 }
346
347 void setNextNPC(uint64_t val)
348 {
349 regs.setNextNPC(val);
350 }
351
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 335 unchanged lines hidden (view full) ---

344 return regs.readNextNPC();
345 }
346
347 void setNextNPC(uint64_t val)
348 {
349 regs.setNextNPC(val);
350 }
351
352 MiscReg readMiscRegNoEffect(int misc_reg)
352 MiscReg readMiscRegNoEffect(int misc_reg, unsigned tid = 0)
353 {
354 return regs.readMiscRegNoEffect(misc_reg);
355 }
356
353 {
354 return regs.readMiscRegNoEffect(misc_reg);
355 }
356
357 MiscReg readMiscReg(int misc_reg)
357 MiscReg readMiscReg(int misc_reg, unsigned tid = 0)
358 {
359 return regs.readMiscReg(misc_reg, tc);
360 }
361
358 {
359 return regs.readMiscReg(misc_reg, tc);
360 }
361
362 void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
362 void setMiscRegNoEffect(int misc_reg, const MiscReg &val, unsigned tid = 0)
363 {
364 return regs.setMiscRegNoEffect(misc_reg, val);
365 }
366
363 {
364 return regs.setMiscRegNoEffect(misc_reg, val);
365 }
366
367 void setMiscReg(int misc_reg, const MiscReg &val)
367 void setMiscReg(int misc_reg, const MiscReg &val, unsigned tid = 0)
368 {
369 return regs.setMiscReg(misc_reg, val, tc);
370 }
371
372 unsigned readStCondFailures() { return storeCondFailures; }
373
374 void setStCondFailures(unsigned sc_failures)
375 { storeCondFailures = sc_failures; }

--- 42 unchanged lines hidden --- 		368 {
369 return regs.setMiscReg(misc_reg, val, tc);
370 }
371
372 unsigned readStCondFailures() { return storeCondFailures; }
373
374 void setStCondFailures(unsigned sc_failures)
375 { storeCondFailures = sc_failures; }

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