| simple_thread.hh (3791:f1783bae1afe) | simple_thread.hh (4172:141705d83494) |
|---|---|
| 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 336 unchanged lines hidden (view full) --- 345 return regs.readNextNPC(); 346 } 347 348 void setNextNPC(uint64_t val) 349 { 350 regs.setNextNPC(val); 351 } 352 | 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 336 unchanged lines hidden (view full) --- 345 return regs.readNextNPC(); 346 } 347 348 void setNextNPC(uint64_t val) 349 { 350 regs.setNextNPC(val); 351 } 352 |
| 353 MiscReg readMiscReg(int misc_reg) | 353 MiscReg readMiscRegNoEffect(int misc_reg) |
| 354 { | 354 { |
| 355 return regs.readMiscReg(misc_reg); | 355 return regs.readMiscRegNoEffect(misc_reg); |
| 356 } 357 | 356 } 357 |
| 358 MiscReg readMiscRegWithEffect(int misc_reg) | 358 MiscReg readMiscReg(int misc_reg) |
| 359 { | 359 { |
| 360 return regs.readMiscRegWithEffect(misc_reg, tc); | 360 return regs.readMiscReg(misc_reg, tc); |
| 361 } 362 | 361 } 362 |
| 363 void setMiscReg(int misc_reg, const MiscReg &val) | 363 void setMiscRegNoEffect(int misc_reg, const MiscReg &val) |
| 364 { | 364 { |
| 365 return regs.setMiscReg(misc_reg, val); | 365 return regs.setMiscRegNoEffect(misc_reg, val); |
| 366 } 367 | 366 } 367 |
| 368 void setMiscRegWithEffect(int misc_reg, const MiscReg &val) | 368 void setMiscReg(int misc_reg, const MiscReg &val) |
| 369 { | 369 { |
| 370 return regs.setMiscRegWithEffect(misc_reg, val, tc); | 370 return regs.setMiscReg(misc_reg, val, tc); |
| 371 } 372 373 unsigned readStCondFailures() { return storeCondFailures; } 374 375 void setStCondFailures(unsigned sc_failures) 376 { storeCondFailures = sc_failures; } 377 378#if !FULL_SYSTEM --- 40 unchanged lines hidden --- | 371 } 372 373 unsigned readStCondFailures() { return storeCondFailures; } 374 375 void setStCondFailures(unsigned sc_failures) 376 { storeCondFailures = sc_failures; } 377 378#if !FULL_SYSTEM --- 40 unchanged lines hidden --- |