1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 93 unchanged lines hidden (view full) --- 102 RegFile regs; // correct-path register context 103 union { 104 FloatReg f[TheISA::NumFloatRegs]; 105 FloatRegBits i[TheISA::NumFloatRegs]; 106 } floatRegs; 107 TheISA::IntReg intRegs[TheISA::NumIntRegs]; 108 TheISA::ISA isa; // one "instance" of the current ISA. 109 |
110 /** The current microcode pc for the currently executing macro 111 * operation. 112 */ 113 MicroPC microPC; 114 115 /** The next microcode pc for the currently executing macro 116 * operation. 117 */ 118 MicroPC nextMicroPC; 119 120 /** The current pc. 121 */ 122 Addr PC; 123 124 /** The next pc. 125 */ 126 Addr nextPC; 127 128 /** The next next pc. 129 */ 130 Addr nextNPC; 131 |
132 public: 133 // pointer to CPU associated with this SimpleThread 134 BaseCPU *cpu; 135 136 ProxyThreadContext<SimpleThread> *tc; 137 138 System *system; 139 --- 109 unchanged lines hidden (view full) --- 249 return NoFault; 250 } 251 252 void copyArchRegs(ThreadContext *tc); 253 254 void clearArchRegs() 255 { 256 regs.clear(); |
257 microPC = 0; 258 nextMicroPC = 1; 259 PC = nextPC = nextNPC = 0; |
260 memset(intRegs, 0, sizeof(intRegs)); 261 memset(floatRegs.i, 0, sizeof(floatRegs.i)); 262 } 263 264 // 265 // New accessors for new decoder. 266 // 267 uint64_t readIntReg(int reg_idx) --- 35 unchanged lines hidden (view full) --- 303 { 304 int flatIndex = isa.flattenFloatIndex(reg_idx); 305 assert(flatIndex < TheISA::NumFloatRegs); 306 floatRegs.i[flatIndex] = val; 307 } 308 309 uint64_t readPC() 310 { |
311 return PC; |
312 } 313 314 void setPC(uint64_t val) 315 { |
316 PC = val; |
317 } 318 319 uint64_t readMicroPC() 320 { 321 return microPC; 322 } 323 324 void setMicroPC(uint64_t val) 325 { 326 microPC = val; 327 } 328 329 uint64_t readNextPC() 330 { |
331 return nextPC; |
332 } 333 334 void setNextPC(uint64_t val) 335 { |
336 nextPC = val; |
337 } 338 339 uint64_t readNextMicroPC() 340 { 341 return nextMicroPC; 342 } 343 344 void setNextMicroPC(uint64_t val) 345 { 346 nextMicroPC = val; 347 } 348 349 uint64_t readNextNPC() 350 { |
351#if ISA_HAS_DELAY_SLOT 352 return nextNPC; 353#else 354 return nextPC + sizeof(TheISA::MachInst); 355#endif |
356 } 357 358 void setNextNPC(uint64_t val) 359 { |
360#if ISA_HAS_DELAY_SLOT 361 nextNPC = val; 362#endif |
363 } 364 365 MiscReg 366 readMiscRegNoEffect(int misc_reg, ThreadID tid = 0) 367 { 368 return isa.readMiscRegNoEffect(misc_reg); 369 } 370 --- 52 unchanged lines hidden --- |