110,111c110,111
< AlphaITB *itb;
< AlphaDTB *dtb;
---
> TheISA::ITB *itb;
> TheISA::DTB *dtb;
117c117
< AlphaITB *_itb, AlphaDTB *_dtb,
---
> TheISA::ITB *_itb, TheISA::DTB *_dtb,
170,171d169
< int readIntrFlag() { return regs.intrflag; }
< void setIntrFlag(int val) { regs.intrflag = val; }
204c202
< AlphaITB *getITBPtr() { return itb; }
---
> TheISA::ITB *getITBPtr() { return itb; }
206c204
< AlphaDTB *getDTBPtr() { return dtb; }
---
> TheISA::DTB *getDTBPtr() { return dtb; }
425c423
< MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
---
> MiscReg readMiscRegWithEffect(int misc_reg)
427c425
< return regs.readMiscRegWithEffect(misc_reg, fault, tc);
---
> return regs.readMiscRegWithEffect(misc_reg, tc);
430c428
< Fault setMiscReg(int misc_reg, const MiscReg &val)
---
> void setMiscReg(int misc_reg, const MiscReg &val)
435c433
< Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
---
> void setMiscRegWithEffect(int misc_reg, const MiscReg &val)