1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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30 */
31
32#ifndef __CPU_SIMPLE_THREAD_HH__
33#define __CPU_SIMPLE_THREAD_HH__
34
35#include "arch/isa_traits.hh"
36#include "arch/regfile.hh"
37#include "arch/syscallreturn.hh"
38#include "arch/tlb.hh"
39#include "config/full_system.hh"
40#include "cpu/thread_context.hh"
41#include "cpu/thread_state.hh"
42#include "mem/request.hh"
43#include "sim/byteswap.hh"
44#include "sim/eventq.hh"
45#include "sim/host.hh"
46#include "sim/serialize.hh"
47
48class BaseCPU;
49
50#if FULL_SYSTEM
51
52#include "sim/system.hh"
53
54class FunctionProfile;
55class ProfileNode;
56class FunctionalPort;
57class PhysicalPort;
58
59namespace TheISA {
60 namespace Kernel {

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104 public:
105 // pointer to CPU associated with this SimpleThread
106 BaseCPU *cpu;
107
108 ProxyThreadContext<SimpleThread> *tc;
109
110 System *system;
111
112 TheISA::ITB *itb;
113 TheISA::DTB *dtb;
114
115 // constructor: initialize SimpleThread from given process structure
116#if FULL_SYSTEM
117 SimpleThread(BaseCPU *_cpu, int _thread_num, System *_system,
118 TheISA::ITB *_itb, TheISA::DTB *_dtb,
119 bool use_kernel_stats = true);
120#else
121 SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
122 TheISA::ITB *_itb, TheISA::DTB *_dtb, int _asid);
123#endif
124
125 SimpleThread();
126
127 virtual ~SimpleThread();
128
129 virtual void takeOverFrom(ThreadContext *oldContext);
130

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143 **************************************************************/
144
145 /** Returns the pointer to this SimpleThread's ThreadContext. Used
146 * when a ThreadContext must be passed to objects outside of the
147 * CPU.
148 */
149 ThreadContext *getTC() { return tc; }
150
151 Fault translateInstReq(RequestPtr &req)
152 {
153 return itb->translate(req, tc);
154 }
155
156 Fault translateDataReadReq(RequestPtr &req)
157 {
158 return dtb->translate(req, tc, false);
159 }
160
161 Fault translateDataWriteReq(RequestPtr &req)
162 {
163 return dtb->translate(req, tc, true);
164 }
165
166#if FULL_SYSTEM
167 int getInstAsid() { return regs.instAsid(); }
168 int getDataAsid() { return regs.dataAsid(); }
169
170 void dumpFuncProfile();
171
172 Fault hwrei();
173
174 bool simPalCheck(int palFunc);
175
176#endif
177
178 /*******************************************
179 * ThreadContext interface functions.
180 ******************************************/
181
182 BaseCPU *getCpuPtr() { return cpu; }
183
184 int getThreadNum() { return tid; }
185
186 TheISA::ITB *getITBPtr() { return itb; }
187
188 TheISA::DTB *getDTBPtr() { return dtb; }
189
190#if FULL_SYSTEM
191 System *getSystemPtr() { return system; }
192
193 FunctionalPort *getPhysPort() { return physPort; }
194
195 /** Return a virtual port. If no thread context is specified then a static
196 * port is returned. Otherwise a port is created and returned. It must be
197 * deleted by deleteVirtPort(). */
198 VirtualPort *getVirtPort(ThreadContext *tc);
199
200 void delVirtPort(VirtualPort *vp);

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