simple_thread.cc (6316:51f3026d4cbb) | simple_thread.cc (6324:a535b2232c08) |
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1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 49 unchanged lines hidden (view full) --- 58 59using namespace std; 60 61// constructor 62#if FULL_SYSTEM 63SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 64 TheISA::TLB *_itb, TheISA::TLB *_dtb, 65 bool use_kernel_stats) | 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 49 unchanged lines hidden (view full) --- 58 59using namespace std; 60 61// constructor 62#if FULL_SYSTEM 63SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 64 TheISA::TLB *_itb, TheISA::TLB *_dtb, 65 bool use_kernel_stats) |
66 : ThreadState(_cpu, _thread_num), cpu(_cpu), system(_sys), itb(_itb), 67 dtb(_dtb) | 66 : ThreadState(_cpu, _thread_num), 67 cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb) |
68 69{ 70 tc = new ProxyThreadContext<SimpleThread>(this); 71 72 quiesceEvent = new EndQuiesceEvent(tc); 73 74 clearArchRegs(); 75 --- 113 unchanged lines hidden (view full) --- 189 190void 191SimpleThread::serialize(ostream &os) 192{ 193 ThreadState::serialize(os); 194 regs.serialize(cpu, os); 195 SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 196 SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); | 68 69{ 70 tc = new ProxyThreadContext<SimpleThread>(this); 71 72 quiesceEvent = new EndQuiesceEvent(tc); 73 74 clearArchRegs(); 75 --- 113 unchanged lines hidden (view full) --- 189 190void 191SimpleThread::serialize(ostream &os) 192{ 193 ThreadState::serialize(os); 194 regs.serialize(cpu, os); 195 SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 196 SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); |
197 SERIALIZE_SCALAR(microPC); 198 SERIALIZE_SCALAR(nextMicroPC); 199 SERIALIZE_SCALAR(PC); 200 SERIALIZE_SCALAR(nextPC); 201 SERIALIZE_SCALAR(nextNPC); |
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197 // thread_num and cpu_id are deterministic from the config 198} 199 200 201void 202SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) 203{ 204 ThreadState::unserialize(cp, section); 205 regs.unserialize(cpu, cp, section); 206 UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 207 UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); | 202 // thread_num and cpu_id are deterministic from the config 203} 204 205 206void 207SimpleThread::unserialize(Checkpoint *cp, const std::string §ion) 208{ 209 ThreadState::unserialize(cp, section); 210 regs.unserialize(cpu, cp, section); 211 UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs); 212 UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs); |
213 UNSERIALIZE_SCALAR(microPC); 214 UNSERIALIZE_SCALAR(nextMicroPC); 215 UNSERIALIZE_SCALAR(PC); 216 UNSERIALIZE_SCALAR(nextPC); 217 UNSERIALIZE_SCALAR(nextNPC); |
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208 // thread_num and cpu_id are deterministic from the config 209} 210 211#if FULL_SYSTEM 212void 213SimpleThread::dumpFuncProfile() 214{ 215 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); --- 71 unchanged lines hidden --- | 218 // thread_num and cpu_id are deterministic from the config 219} 220 221#if FULL_SYSTEM 222void 223SimpleThread::dumpFuncProfile() 224{ 225 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); --- 71 unchanged lines hidden --- |