1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 48 unchanged lines hidden (view full) --- 57#include "mem/translating_port.hh" 58#include "sim/process.hh" 59#include "sim/system.hh" 60#endif 61 62using namespace std; 63 64// constructor |
65#if !FULL_SYSTEM 66SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, 67 TheISA::TLB *_itb, TheISA::TLB *_dtb) 68 : ThreadState(_cpu, _thread_num, _process), 69 cpu(_cpu), itb(_itb), dtb(_dtb) 70{ 71 clearArchRegs(); 72 tc = new ProxyThreadContext<SimpleThread>(this); 73} 74#else |
75SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 76 TheISA::TLB *_itb, TheISA::TLB *_dtb, 77 bool use_kernel_stats) |
78 : ThreadState(_cpu, _thread_num, NULL), |
79 cpu(_cpu), system(_sys), itb(_itb), dtb(_dtb) 80 81{ 82 tc = new ProxyThreadContext<SimpleThread>(this); 83 84 quiesceEvent = new EndQuiesceEvent(tc); 85 86 clearArchRegs(); --- 10 unchanged lines hidden (view full) --- 97 // on the first cycle when there's no node available. 98 static ProfileNode dummyNode; 99 profileNode = &dummyNode; 100 profilePC = 3; 101 102 if (use_kernel_stats) 103 kernelStats = new TheISA::Kernel::Statistics(system); 104} |
105#endif 106 107SimpleThread::SimpleThread() |
108 : ThreadState(NULL, -1, NULL) |
109{ 110 tc = new ProxyThreadContext<SimpleThread>(this); 111} 112 113SimpleThread::~SimpleThread() 114{ 115 delete physPort; 116 delete virtPort; --- 174 unchanged lines hidden --- |