1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 49 unchanged lines hidden (view full) --- 58#include "sim/system.hh" 59 60using namespace std; 61 62// constructor 63SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 64 Process *_process, TheISA::TLB *_itb, 65 TheISA::TLB *_dtb, TheISA::ISA *_isa) |
66 : ThreadState(_cpu, _thread_num, _process), isa(_isa), 67 predicate(false), system(_sys), |
68 itb(_itb), dtb(_dtb) 69{ 70 clearArchRegs(); 71 tc = new ProxyThreadContext<SimpleThread>(this); 72} 73 74SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys, 75 TheISA::TLB *_itb, TheISA::TLB *_dtb, --- 149 unchanged lines hidden --- |