1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 * Lisa Hsu
31 * Kevin Lim
32 */
33
34#include <string>
35
36#include "arch/isa_traits.hh"
37#include "cpu/base.hh"
38#include "cpu/simple_thread.hh"
39#include "cpu/thread_context.hh"
40
41#if FULL_SYSTEM
42#include "base/callback.hh"
43#include "base/cprintf.hh"
44#include "base/output.hh"
45#include "base/trace.hh"
46#include "cpu/profile.hh"
47#include "cpu/quiesce_event.hh"
48#include "kern/kernel_stats.hh"
49#include "sim/serialize.hh"
50#include "sim/sim_exit.hh"
51#include "arch/stacktrace.hh"
52#else
53#include "sim/process.hh"
54#include "sim/system.hh"
55#include "mem/translating_port.hh"
56#endif
57
58using namespace std;
59
60// constructor
61#if FULL_SYSTEM
62SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
63 AlphaITB *_itb, AlphaDTB *_dtb,
64 bool use_kernel_stats)
65 : ThreadState(-1, _thread_num), cpu(_cpu), system(_sys), itb(_itb),
66 dtb(_dtb)
67
68{
69 tc = new ProxyThreadContext<SimpleThread>(this);
70
71 quiesceEvent = new EndQuiesceEvent(tc);
72
73 regs.clear();
74
75 if (cpu->params->profile) {
76 profile = new FunctionProfile(system->kernelSymtab);
77 Callback *cb =
78 new MakeCallback<SimpleThread,
79 &SimpleThread::dumpFuncProfile>(this);
80 registerExitCallback(cb);
81 }
82
83 // let's fill with a dummy node for now so we don't get a segfault
84 // on the first cycle when there's no node available.
85 static ProfileNode dummyNode;
86 profileNode = &dummyNode;
87 profilePC = 3;
88
89 if (use_kernel_stats) {
90 kernelStats = new Kernel::Statistics(system);
91 } else {
92 kernelStats = NULL;
93 }
94 Port *mem_port;
95 physPort = new FunctionalPort(csprintf("%s-%d-funcport",
96 cpu->name(), tid));
97 mem_port = system->physmem->getPort("functional");
98 mem_port->setPeer(physPort);
99 physPort->setPeer(mem_port);
100
101 virtPort = new VirtualPort(csprintf("%s-%d-vport",
102 cpu->name(), tid));
103 mem_port = system->physmem->getPort("functional");
104 mem_port->setPeer(virtPort);
105 virtPort->setPeer(mem_port);
106}
107#else
108SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num,
109 Process *_process, int _asid, MemObject* memobj)
| 1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 * Nathan Binkert
30 * Lisa Hsu
31 * Kevin Lim
32 */
33
34#include <string>
35
36#include "arch/isa_traits.hh"
37#include "cpu/base.hh"
38#include "cpu/simple_thread.hh"
39#include "cpu/thread_context.hh"
40
41#if FULL_SYSTEM
42#include "base/callback.hh"
43#include "base/cprintf.hh"
44#include "base/output.hh"
45#include "base/trace.hh"
46#include "cpu/profile.hh"
47#include "cpu/quiesce_event.hh"
48#include "kern/kernel_stats.hh"
49#include "sim/serialize.hh"
50#include "sim/sim_exit.hh"
51#include "arch/stacktrace.hh"
52#else
53#include "sim/process.hh"
54#include "sim/system.hh"
55#include "mem/translating_port.hh"
56#endif
57
58using namespace std;
59
60// constructor
61#if FULL_SYSTEM
62SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
63 AlphaITB *_itb, AlphaDTB *_dtb,
64 bool use_kernel_stats)
65 : ThreadState(-1, _thread_num), cpu(_cpu), system(_sys), itb(_itb),
66 dtb(_dtb)
67
68{
69 tc = new ProxyThreadContext<SimpleThread>(this);
70
71 quiesceEvent = new EndQuiesceEvent(tc);
72
73 regs.clear();
74
75 if (cpu->params->profile) {
76 profile = new FunctionProfile(system->kernelSymtab);
77 Callback *cb =
78 new MakeCallback<SimpleThread,
79 &SimpleThread::dumpFuncProfile>(this);
80 registerExitCallback(cb);
81 }
82
83 // let's fill with a dummy node for now so we don't get a segfault
84 // on the first cycle when there's no node available.
85 static ProfileNode dummyNode;
86 profileNode = &dummyNode;
87 profilePC = 3;
88
89 if (use_kernel_stats) {
90 kernelStats = new Kernel::Statistics(system);
91 } else {
92 kernelStats = NULL;
93 }
94 Port *mem_port;
95 physPort = new FunctionalPort(csprintf("%s-%d-funcport",
96 cpu->name(), tid));
97 mem_port = system->physmem->getPort("functional");
98 mem_port->setPeer(physPort);
99 physPort->setPeer(mem_port);
100
101 virtPort = new VirtualPort(csprintf("%s-%d-vport",
102 cpu->name(), tid));
103 mem_port = system->physmem->getPort("functional");
104 mem_port->setPeer(virtPort);
105 virtPort->setPeer(mem_port);
106}
107#else
108SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num,
109 Process *_process, int _asid, MemObject* memobj)
|
111 cpu(_cpu)
112{
113 /* Use this port to for syscall emulation writes to memory. */
114 Port *mem_port;
115 port = new TranslatingPort(csprintf("%s-%d-funcport",
116 cpu->name(), tid),
117 process->pTable, false);
118 mem_port = memobj->getPort("functional");
119 mem_port->setPeer(port);
120 port->setPeer(mem_port);
121
122 regs.clear();
123 tc = new ProxyThreadContext<SimpleThread>(this);
124}
125
126SimpleThread::SimpleThread(RegFile *regFile)
| 111 cpu(_cpu)
112{
113 /* Use this port to for syscall emulation writes to memory. */
114 Port *mem_port;
115 port = new TranslatingPort(csprintf("%s-%d-funcport",
116 cpu->name(), tid),
117 process->pTable, false);
118 mem_port = memobj->getPort("functional");
119 mem_port->setPeer(port);
120 port->setPeer(mem_port);
121
122 regs.clear();
123 tc = new ProxyThreadContext<SimpleThread>(this);
124}
125
126SimpleThread::SimpleThread(RegFile *regFile)
|
128{
129 regs = *regFile;
130 tc = new ProxyThreadContext<SimpleThread>(this);
131}
132
133#endif
134
135SimpleThread::~SimpleThread()
136{
137 delete tc;
138}
139
140void
141SimpleThread::takeOverFrom(ThreadContext *oldContext)
142{
143 // some things should already be set up
144#if FULL_SYSTEM
145 assert(system == oldContext->getSystemPtr());
146#else
147 assert(process == oldContext->getProcessPtr());
148#endif
149
150 // copy over functional state
151 _status = oldContext->status();
152 copyArchRegs(oldContext);
153 cpuId = oldContext->readCpuId();
154#if !FULL_SYSTEM
155 funcExeInst = oldContext->readFuncExeInst();
156#else
157 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
158 if (quiesce) {
159 // Point the quiesce event's TC at this TC so that it wakes up
160 // the proper CPU.
161 quiesce->tc = tc;
162 }
163 if (quiesceEvent) {
164 quiesceEvent->tc = tc;
165 }
166#endif
167
168 storeCondFailures = 0;
169
170 oldContext->setStatus(ThreadContext::Unallocated);
171}
172
173void
174SimpleThread::serialize(ostream &os)
175{
176 SERIALIZE_ENUM(_status);
177 regs.serialize(os);
178 // thread_num and cpu_id are deterministic from the config
179 SERIALIZE_SCALAR(funcExeInst);
180 SERIALIZE_SCALAR(inst);
181
182#if FULL_SYSTEM
183 Tick quiesceEndTick = 0;
184 if (quiesceEvent->scheduled())
185 quiesceEndTick = quiesceEvent->when();
186 SERIALIZE_SCALAR(quiesceEndTick);
187 if (kernelStats)
188 kernelStats->serialize(os);
189#endif
190}
191
192
193void
194SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
195{
196 UNSERIALIZE_ENUM(_status);
197 regs.unserialize(cp, section);
198 // thread_num and cpu_id are deterministic from the config
199 UNSERIALIZE_SCALAR(funcExeInst);
200 UNSERIALIZE_SCALAR(inst);
201
202#if FULL_SYSTEM
203 Tick quiesceEndTick;
204 UNSERIALIZE_SCALAR(quiesceEndTick);
205 if (quiesceEndTick)
206 quiesceEvent->schedule(quiesceEndTick);
207 if (kernelStats)
208 kernelStats->unserialize(cp, section);
209#endif
210}
211
212#if FULL_SYSTEM
213void
214SimpleThread::dumpFuncProfile()
215{
216 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
217 profile->dump(tc, *os);
218}
219#endif
220
221void
222SimpleThread::activate(int delay)
223{
224 if (status() == ThreadContext::Active)
225 return;
226
227 lastActivate = curTick;
228
229 if (status() == ThreadContext::Unallocated) {
230 cpu->activateWhenReady(tid);
231 return;
232 }
233
234 _status = ThreadContext::Active;
235
236 // status() == Suspended
237 cpu->activateContext(tid, delay);
238}
239
240void
241SimpleThread::suspend()
242{
243 if (status() == ThreadContext::Suspended)
244 return;
245
246 lastActivate = curTick;
247 lastSuspend = curTick;
248/*
249#if FULL_SYSTEM
250 // Don't change the status from active if there are pending interrupts
251 if (cpu->check_interrupts()) {
252 assert(status() == ThreadContext::Active);
253 return;
254 }
255#endif
256*/
257 _status = ThreadContext::Suspended;
258 cpu->suspendContext(tid);
259}
260
261void
262SimpleThread::deallocate()
263{
264 if (status() == ThreadContext::Unallocated)
265 return;
266
267 _status = ThreadContext::Unallocated;
268 cpu->deallocateContext(tid);
269}
270
271void
272SimpleThread::halt()
273{
274 if (status() == ThreadContext::Halted)
275 return;
276
277 _status = ThreadContext::Halted;
278 cpu->haltContext(tid);
279}
280
281
282void
283SimpleThread::regStats(const string &name)
284{
285#if FULL_SYSTEM
286 if (kernelStats)
287 kernelStats->regStats(name + ".kern");
288#endif
289}
290
291void
292SimpleThread::copyArchRegs(ThreadContext *src_tc)
293{
294 TheISA::copyRegs(src_tc, tc);
295}
296
297#if FULL_SYSTEM
298VirtualPort*
299SimpleThread::getVirtPort(ThreadContext *src_tc)
300{
301 if (!src_tc)
302 return virtPort;
303
304 VirtualPort *vp;
305 Port *mem_port;
306
307 vp = new VirtualPort("tc-vport", src_tc);
308 mem_port = system->physmem->getPort("functional");
309 mem_port->setPeer(vp);
310 vp->setPeer(mem_port);
311 return vp;
312}
313
314void
315SimpleThread::delVirtPort(VirtualPort *vp)
316{
317 if (vp != virtPort) {
318 delete vp->getPeer();
319 delete vp;
320 }
321}
322
323
324#endif
325
| 128{
129 regs = *regFile;
130 tc = new ProxyThreadContext<SimpleThread>(this);
131}
132
133#endif
134
135SimpleThread::~SimpleThread()
136{
137 delete tc;
138}
139
140void
141SimpleThread::takeOverFrom(ThreadContext *oldContext)
142{
143 // some things should already be set up
144#if FULL_SYSTEM
145 assert(system == oldContext->getSystemPtr());
146#else
147 assert(process == oldContext->getProcessPtr());
148#endif
149
150 // copy over functional state
151 _status = oldContext->status();
152 copyArchRegs(oldContext);
153 cpuId = oldContext->readCpuId();
154#if !FULL_SYSTEM
155 funcExeInst = oldContext->readFuncExeInst();
156#else
157 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
158 if (quiesce) {
159 // Point the quiesce event's TC at this TC so that it wakes up
160 // the proper CPU.
161 quiesce->tc = tc;
162 }
163 if (quiesceEvent) {
164 quiesceEvent->tc = tc;
165 }
166#endif
167
168 storeCondFailures = 0;
169
170 oldContext->setStatus(ThreadContext::Unallocated);
171}
172
173void
174SimpleThread::serialize(ostream &os)
175{
176 SERIALIZE_ENUM(_status);
177 regs.serialize(os);
178 // thread_num and cpu_id are deterministic from the config
179 SERIALIZE_SCALAR(funcExeInst);
180 SERIALIZE_SCALAR(inst);
181
182#if FULL_SYSTEM
183 Tick quiesceEndTick = 0;
184 if (quiesceEvent->scheduled())
185 quiesceEndTick = quiesceEvent->when();
186 SERIALIZE_SCALAR(quiesceEndTick);
187 if (kernelStats)
188 kernelStats->serialize(os);
189#endif
190}
191
192
193void
194SimpleThread::unserialize(Checkpoint *cp, const std::string §ion)
195{
196 UNSERIALIZE_ENUM(_status);
197 regs.unserialize(cp, section);
198 // thread_num and cpu_id are deterministic from the config
199 UNSERIALIZE_SCALAR(funcExeInst);
200 UNSERIALIZE_SCALAR(inst);
201
202#if FULL_SYSTEM
203 Tick quiesceEndTick;
204 UNSERIALIZE_SCALAR(quiesceEndTick);
205 if (quiesceEndTick)
206 quiesceEvent->schedule(quiesceEndTick);
207 if (kernelStats)
208 kernelStats->unserialize(cp, section);
209#endif
210}
211
212#if FULL_SYSTEM
213void
214SimpleThread::dumpFuncProfile()
215{
216 std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name()));
217 profile->dump(tc, *os);
218}
219#endif
220
221void
222SimpleThread::activate(int delay)
223{
224 if (status() == ThreadContext::Active)
225 return;
226
227 lastActivate = curTick;
228
229 if (status() == ThreadContext::Unallocated) {
230 cpu->activateWhenReady(tid);
231 return;
232 }
233
234 _status = ThreadContext::Active;
235
236 // status() == Suspended
237 cpu->activateContext(tid, delay);
238}
239
240void
241SimpleThread::suspend()
242{
243 if (status() == ThreadContext::Suspended)
244 return;
245
246 lastActivate = curTick;
247 lastSuspend = curTick;
248/*
249#if FULL_SYSTEM
250 // Don't change the status from active if there are pending interrupts
251 if (cpu->check_interrupts()) {
252 assert(status() == ThreadContext::Active);
253 return;
254 }
255#endif
256*/
257 _status = ThreadContext::Suspended;
258 cpu->suspendContext(tid);
259}
260
261void
262SimpleThread::deallocate()
263{
264 if (status() == ThreadContext::Unallocated)
265 return;
266
267 _status = ThreadContext::Unallocated;
268 cpu->deallocateContext(tid);
269}
270
271void
272SimpleThread::halt()
273{
274 if (status() == ThreadContext::Halted)
275 return;
276
277 _status = ThreadContext::Halted;
278 cpu->haltContext(tid);
279}
280
281
282void
283SimpleThread::regStats(const string &name)
284{
285#if FULL_SYSTEM
286 if (kernelStats)
287 kernelStats->regStats(name + ".kern");
288#endif
289}
290
291void
292SimpleThread::copyArchRegs(ThreadContext *src_tc)
293{
294 TheISA::copyRegs(src_tc, tc);
295}
296
297#if FULL_SYSTEM
298VirtualPort*
299SimpleThread::getVirtPort(ThreadContext *src_tc)
300{
301 if (!src_tc)
302 return virtPort;
303
304 VirtualPort *vp;
305 Port *mem_port;
306
307 vp = new VirtualPort("tc-vport", src_tc);
308 mem_port = system->physmem->getPort("functional");
309 mem_port->setPeer(vp);
310 vp->setPeer(mem_port);
311 return vp;
312}
313
314void
315SimpleThread::delVirtPort(VirtualPort *vp)
316{
317 if (vp != virtPort) {
318 delete vp->getPeer();
319 delete vp;
320 }
321}
322
323
324#endif
325
|