simple_thread.cc (8766:b0773af78423) | simple_thread.cc (8767:e575781f71b8) |
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1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36#include "arch/isa_traits.hh" 37#include "arch/utility.hh" 38#include "config/the_isa.hh" 39#include "cpu/base.hh" 40#include "cpu/simple_thread.hh" 41#include "cpu/thread_context.hh" 42#include "mem/vport.hh" 43#include "params/BaseCPU.hh" | 1/* 2 * Copyright (c) 2001-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 27 unchanged lines hidden (view full) --- 36#include "arch/isa_traits.hh" 37#include "arch/utility.hh" 38#include "config/the_isa.hh" 39#include "cpu/base.hh" 40#include "cpu/simple_thread.hh" 41#include "cpu/thread_context.hh" 42#include "mem/vport.hh" 43#include "params/BaseCPU.hh" |
44#include "sim/process.hh" |
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44 45#if FULL_SYSTEM 46#include "arch/kernel_stats.hh" 47#include "arch/stacktrace.hh" 48#include "base/callback.hh" 49#include "base/cprintf.hh" 50#include "base/output.hh" 51#include "base/trace.hh" 52#include "cpu/profile.hh" 53#include "cpu/quiesce_event.hh" 54#include "sim/serialize.hh" 55#include "sim/sim_exit.hh" 56#else 57#include "mem/translating_port.hh" | 45 46#if FULL_SYSTEM 47#include "arch/kernel_stats.hh" 48#include "arch/stacktrace.hh" 49#include "base/callback.hh" 50#include "base/cprintf.hh" 51#include "base/output.hh" 52#include "base/trace.hh" 53#include "cpu/profile.hh" 54#include "cpu/quiesce_event.hh" 55#include "sim/serialize.hh" 56#include "sim/sim_exit.hh" 57#else 58#include "mem/translating_port.hh" |
58#include "sim/process.hh" | |
59#include "sim/system.hh" 60#endif 61 62using namespace std; 63 64// constructor 65#if !FULL_SYSTEM 66SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, --- 51 unchanged lines hidden (view full) --- 118} 119 120void 121SimpleThread::takeOverFrom(ThreadContext *oldContext) 122{ 123 // some things should already be set up 124#if FULL_SYSTEM 125 assert(system == oldContext->getSystemPtr()); | 59#include "sim/system.hh" 60#endif 61 62using namespace std; 63 64// constructor 65#if !FULL_SYSTEM 66SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process, --- 51 unchanged lines hidden (view full) --- 118} 119 120void 121SimpleThread::takeOverFrom(ThreadContext *oldContext) 122{ 123 // some things should already be set up 124#if FULL_SYSTEM 125 assert(system == oldContext->getSystemPtr()); |
126#else 127 assert(process == oldContext->getProcessPtr()); | |
128#endif | 126#endif |
127 assert(process == oldContext->getProcessPtr()); |
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129 130 copyState(oldContext); 131#if FULL_SYSTEM 132 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent(); 133 if (quiesce) { 134 // Point the quiesce event's TC at this TC so that it wakes up 135 // the proper CPU. 136 quiesce->tc = tc; --- 154 unchanged lines hidden --- | 128 129 copyState(oldContext); 130#if FULL_SYSTEM 131 EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent(); 132 if (quiesce) { 133 // Point the quiesce event's TC at this TC so that it wakes up 134 // the proper CPU. 135 quiesce->tc = tc; --- 154 unchanged lines hidden --- |