timing.hh (9830:5995f4d33a11) timing.hh (9840:c562aa658a6f)
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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317 * <ul>
318 * <li>We are in the middle of a microcode sequence as some CPUs
319 * (e.g., HW accelerated CPUs) can't be started in the middle
320 * of a gem5 microcode sequence.
321 *
322 * <li>Stay at PC is true.
323 *
324 * <li>A fetch event is scheduled. Normally this would never be the
1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 308 unchanged lines hidden (view full) ---

317 * <ul>
318 * <li>We are in the middle of a microcode sequence as some CPUs
319 * (e.g., HW accelerated CPUs) can't be started in the middle
320 * of a gem5 microcode sequence.
321 *
322 * <li>Stay at PC is true.
323 *
324 * <li>A fetch event is scheduled. Normally this would never be the
325 case with microPC() == 0, but right after a context is
326 activated it can happen.
325 * case with microPC() == 0, but right after a context is
326 * activated it can happen.
327 * </ul>
328 */
329 bool isDrained() {
330 return microPC() == 0 && !stayAtPC && !fetchEvent.scheduled();
331 }
332
333 /**
334 * Try to complete a drain request.

--- 14 unchanged lines hidden --- 		327 * </ul>
328 */
329 bool isDrained() {
330 return microPC() == 0 && !stayAtPC && !fetchEvent.scheduled();
331 }
332
333 /**
334 * Try to complete a drain request.

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