timing.hh (5744:342cbc20a188) timing.hh (5890:bdef71accd68)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 210 unchanged lines hidden (view full) ---

219 void takeOverFrom(BaseCPU *oldCPU);
220
221 virtual void activateContext(int thread_num, int delay);
222 virtual void suspendContext(int thread_num);
223
224 template <class T>
225 Fault read(Addr addr, T &data, unsigned flags);
226
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 210 unchanged lines hidden (view full) ---

219 void takeOverFrom(BaseCPU *oldCPU);
220
221 virtual void activateContext(int thread_num, int delay);
222 virtual void suspendContext(int thread_num);
223
224 template <class T>
225 Fault read(Addr addr, T &data, unsigned flags);
226
227 Fault translateDataReadAddr(Addr vaddr, Addr &paddr,
228 int size, unsigned flags);
229
230 template <class T>
231 Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
232
227 template <class T>
228 Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
229
233 Fault translateDataWriteAddr(Addr vaddr, Addr &paddr,
234 int size, unsigned flags);
235
236 void fetch();
237 void completeIfetch(PacketPtr );
238 void completeDataAccess(PacketPtr );
239 void advanceInst(Fault fault);
240
241 /**
242 * Print state of address in memory system via PrintReq (for
243 * debugging).

--- 20 unchanged lines hidden --- 		230 void fetch();
231 void completeIfetch(PacketPtr );
232 void completeDataAccess(PacketPtr );
233 void advanceInst(Fault fault);
234
235 /**
236 * Print state of address in memory system via PrintReq (for
237 * debugging).

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