timing.hh (5606:6da7a58b0bc8) timing.hh (5710:b44dd45bd604)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 178 unchanged lines hidden (view full) ---

187 * Print state of address in memory system via PrintReq (for
188 * debugging).
189 */
190 void printAddr(Addr a);
191
192 private:
193
194 typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent;
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 178 unchanged lines hidden (view full) ---

187 * Print state of address in memory system via PrintReq (for
188 * debugging).
189 */
190 void printAddr(Addr a);
191
192 private:
193
194 typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent;
195 FetchEvent *fetchEvent;
195 FetchEvent fetchEvent;
196
197 struct IprEvent : Event {
198 Packet *pkt;
199 TimingSimpleCPU *cpu;
200 IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t);
201 virtual void process();
202 virtual const char *description() const;
203 };
204
205 void completeDrain();
206};
207
208#endif // __CPU_SIMPLE_TIMING_HH__
196
197 struct IprEvent : Event {
198 Packet *pkt;
199 TimingSimpleCPU *cpu;
200 IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t);
201 virtual void process();
202 virtual const char *description() const;
203 };
204
205 void completeDrain();
206};
207
208#endif // __CPU_SIMPLE_TIMING_HH__