timing.hh (3846:a0fe3210ce53) | timing.hh (4192:7accc6365bb9) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 130 unchanged lines hidden (view full) --- 139 class DcachePort : public CpuPort 140 { 141 public: 142 143 DcachePort(TimingSimpleCPU *_cpu, Tick _lat) 144 : CpuPort(_cpu->name() + "-dport", _cpu, _lat), tickEvent(_cpu) 145 { } 146 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 130 unchanged lines hidden (view full) --- 139 class DcachePort : public CpuPort 140 { 141 public: 142 143 DcachePort(TimingSimpleCPU *_cpu, Tick _lat) 144 : CpuPort(_cpu->name() + "-dport", _cpu, _lat), tickEvent(_cpu) 145 { } 146 |
147 virtual void setPeer(Port *port); 148 |
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147 protected: 148 149 virtual bool recvTiming(PacketPtr pkt); 150 151 virtual void recvRetry(); 152 153 struct DTickEvent : public TickEvent 154 { --- 50 unchanged lines hidden --- | 149 protected: 150 151 virtual bool recvTiming(PacketPtr pkt); 152 153 virtual void recvRetry(); 154 155 struct DTickEvent : public TickEvent 156 { --- 50 unchanged lines hidden --- |