timing.hh (2665:a124942bacb8) | timing.hh (2798:751e9170247e) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 50 unchanged lines hidden (view full) --- 59 SwitchedOut 60 }; 61 62 protected: 63 Status _status; 64 65 Status status() const { return _status; } 66 | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 50 unchanged lines hidden (view full) --- 59 SwitchedOut 60 }; 61 62 protected: 63 Status _status; 64 65 Status status() const { return _status; } 66 |
67 Event *quiesceEvent; 68 |
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67 private: 68 69 class CpuPort : public Port 70 { 71 protected: 72 TimingSimpleCPU *cpu; 73 74 public: --- 51 unchanged lines hidden (view full) --- 126 Packet *ifetch_pkt; 127 Packet *dcache_pkt; 128 129 public: 130 131 virtual void serialize(std::ostream &os); 132 virtual void unserialize(Checkpoint *cp, const std::string §ion); 133 | 69 private: 70 71 class CpuPort : public Port 72 { 73 protected: 74 TimingSimpleCPU *cpu; 75 76 public: --- 51 unchanged lines hidden (view full) --- 128 Packet *ifetch_pkt; 129 Packet *dcache_pkt; 130 131 public: 132 133 virtual void serialize(std::ostream &os); 134 virtual void unserialize(Checkpoint *cp, const std::string §ion); 135 |
134 void switchOut(Sampler *s); | 136 virtual bool quiesce(Event *quiesce_event); 137 virtual void resume(); 138 virtual void setMemoryMode(State new_mode); 139 140 void switchOut(); |
135 void takeOverFrom(BaseCPU *oldCPU); 136 137 virtual void activateContext(int thread_num, int delay); 138 virtual void suspendContext(int thread_num); 139 140 template <class T> 141 Fault read(Addr addr, T &data, unsigned flags); 142 143 template <class T> 144 Fault write(T data, Addr addr, unsigned flags, uint64_t *res); 145 146 void fetch(); 147 void completeIfetch(Packet *); 148 void completeDataAccess(Packet *); 149 void advanceInst(Fault fault); | 141 void takeOverFrom(BaseCPU *oldCPU); 142 143 virtual void activateContext(int thread_num, int delay); 144 virtual void suspendContext(int thread_num); 145 146 template <class T> 147 Fault read(Addr addr, T &data, unsigned flags); 148 149 template <class T> 150 Fault write(T data, Addr addr, unsigned flags, uint64_t *res); 151 152 void fetch(); 153 void completeIfetch(Packet *); 154 void completeDataAccess(Packet *); 155 void advanceInst(Fault fault); |
156 private: 157 void completeQuiesce(); |
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150}; 151 152#endif // __CPU_SIMPLE_TIMING_HH__ | 158}; 159 160#endif // __CPU_SIMPLE_TIMING_HH__ |