timing.hh (11608:6319a1125f1c) timing.hh (12085:de78ea63e0ca)
1/*
2 * Copyright (c) 2012-2013,2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 145 unchanged lines hidden (view full) ---

154 * scheduling of handling of incoming packets in the following
155 * cycle.
156 */
157 class TimingCPUPort : public MasterPort
158 {
159 public:
160
161 TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu)
1/*
2 * Copyright (c) 2012-2013,2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 145 unchanged lines hidden (view full) ---

154 * scheduling of handling of incoming packets in the following
155 * cycle.
156 */
157 class TimingCPUPort : public MasterPort
158 {
159 public:
160
161 TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu)
162 : MasterPort(_name, _cpu), cpu(_cpu), retryRespEvent(this)
162 : MasterPort(_name, _cpu), cpu(_cpu),
163 retryRespEvent([this]{ sendRetryResp(); }, name())
163 { }
164
165 protected:
166
167 TimingSimpleCPU* cpu;
168
169 struct TickEvent : public Event
170 {
171 PacketPtr pkt;
172 TimingSimpleCPU *cpu;
173
174 TickEvent(TimingSimpleCPU *_cpu) : pkt(NULL), cpu(_cpu) {}
175 const char *description() const { return "Timing CPU tick"; }
176 void schedule(PacketPtr _pkt, Tick t);
177 };
178
164 { }
165
166 protected:
167
168 TimingSimpleCPU* cpu;
169
170 struct TickEvent : public Event
171 {
172 PacketPtr pkt;
173 TimingSimpleCPU *cpu;
174
175 TickEvent(TimingSimpleCPU *_cpu) : pkt(NULL), cpu(_cpu) {}
176 const char *description() const { return "Timing CPU tick"; }
177 void schedule(PacketPtr _pkt, Tick t);
178 };
179
179 EventWrapper<MasterPort, &MasterPort::sendRetryResp> retryRespEvent;
180 EventFunctionWrapper retryRespEvent;
180 };
181
182 class IcachePort : public TimingCPUPort
183 {
184 public:
185
186 IcachePort(TimingSimpleCPU *_cpu)
187 : TimingCPUPort(_cpu->name() + ".icache_port", _cpu),

--- 122 unchanged lines hidden (view full) ---

310 /**
311 * Finish a DTB translation.
312 * @param state The DTB translation state.
313 */
314 void finishTranslation(WholeTranslationState *state);
315
316 private:
317
181 };
182
183 class IcachePort : public TimingCPUPort
184 {
185 public:
186
187 IcachePort(TimingSimpleCPU *_cpu)
188 : TimingCPUPort(_cpu->name() + ".icache_port", _cpu),

--- 122 unchanged lines hidden (view full) ---

311 /**
312 * Finish a DTB translation.
313 * @param state The DTB translation state.
314 */
315 void finishTranslation(WholeTranslationState *state);
316
317 private:
318
318 typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent;
319 FetchEvent fetchEvent;
319 EventFunctionWrapper fetchEvent;
320
321 struct IprEvent : Event {
322 Packet *pkt;
323 TimingSimpleCPU *cpu;
324 IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t);
325 virtual void process();
326 virtual const char *description() const;
327 };

--- 34 unchanged lines hidden --- 		320
321 struct IprEvent : Event {
322 Packet *pkt;
323 TimingSimpleCPU *cpu;
324 IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t);
325 virtual void process();
326 virtual const char *description() const;
327 };

--- 34 unchanged lines hidden ---