timing.hh (10913:38dbdeea7f1f) | timing.hh (11147:cc8d6e99cf46) |
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1/* | 1/* |
2 * Copyright (c) 2012-2013 ARM Limited | 2 * Copyright (c) 2012-2013,2015 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 28 unchanged lines hidden (view full) --- 39 * 40 * Authors: Steve Reinhardt 41 */ 42 43#ifndef __CPU_SIMPLE_TIMING_HH__ 44#define __CPU_SIMPLE_TIMING_HH__ 45 46#include "cpu/simple/base.hh" | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 28 unchanged lines hidden (view full) --- 39 * 40 * Authors: Steve Reinhardt 41 */ 42 43#ifndef __CPU_SIMPLE_TIMING_HH__ 44#define __CPU_SIMPLE_TIMING_HH__ 45 46#include "cpu/simple/base.hh" |
47#include "cpu/simple/exec_context.hh" |
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47#include "cpu/translation.hh" 48#include "params/TimingSimpleCPU.hh" 49 50class TimingSimpleCPU : public BaseSimpleCPU 51{ 52 public: 53 54 TimingSimpleCPU(TimingSimpleCPUParams * params); --- 282 unchanged lines hidden (view full) --- 337 * <li>Stay at PC is true. 338 * 339 * <li>A fetch event is scheduled. Normally this would never be the 340 * case with microPC() == 0, but right after a context is 341 * activated it can happen. 342 * </ul> 343 */ 344 bool isDrained() { | 48#include "cpu/translation.hh" 49#include "params/TimingSimpleCPU.hh" 50 51class TimingSimpleCPU : public BaseSimpleCPU 52{ 53 public: 54 55 TimingSimpleCPU(TimingSimpleCPUParams * params); --- 282 unchanged lines hidden (view full) --- 338 * <li>Stay at PC is true. 339 * 340 * <li>A fetch event is scheduled. Normally this would never be the 341 * case with microPC() == 0, but right after a context is 342 * activated it can happen. 343 * </ul> 344 */ 345 bool isDrained() { |
345 return microPC() == 0 && !stayAtPC && !fetchEvent.scheduled(); | 346 SimpleExecContext& t_info = *threadInfo[curThread]; 347 SimpleThread* thread = t_info.thread; 348 349 return thread->microPC() == 0 && !t_info.stayAtPC && 350 !fetchEvent.scheduled(); |
346 } 347 348 /** 349 * Try to complete a drain request. 350 * 351 * @returns true if the CPU is drained, false otherwise. 352 */ 353 bool tryCompleteDrain(); 354}; 355 356#endif // __CPU_SIMPLE_TIMING_HH__ | 351 } 352 353 /** 354 * Try to complete a drain request. 355 * 356 * @returns true if the CPU is drained, false otherwise. 357 */ 358 bool tryCompleteDrain(); 359}; 360 361#endif // __CPU_SIMPLE_TIMING_HH__ |