timing.cc (8850:ed91b534ed04) | timing.cc (8921:e53972f72165) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 50 unchanged lines hidden (view full) --- 59 60using namespace std; 61using namespace TheISA; 62 63void 64TimingSimpleCPU::init() 65{ 66 BaseCPU::init(); | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 50 unchanged lines hidden (view full) --- 59 60using namespace std; 61using namespace TheISA; 62 63void 64TimingSimpleCPU::init() 65{ 66 BaseCPU::init(); |
67 68 // Initialise the ThreadContext's memory proxies 69 tcBase()->initMemProxies(tcBase()); 70 |
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67 if (FullSystem) { 68 for (int i = 0; i < threadContexts.size(); ++i) { 69 ThreadContext *tc = threadContexts[i]; 70 // initialize CPU, including PC 71 TheISA::initCPU(tc, _cpuId); 72 } 73 } | 71 if (FullSystem) { 72 for (int i = 0; i < threadContexts.size(); ++i) { 73 ThreadContext *tc = threadContexts[i]; 74 // initialize CPU, including PC 75 TheISA::initCPU(tc, _cpuId); 76 } 77 } |
74 75 // Initialise the ThreadContext's memory proxies 76 tcBase()->initMemProxies(tcBase()); | |
77} 78 79void 80TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t) 81{ 82 pkt = _pkt; 83 cpu->schedule(this, t); 84} --- 877 unchanged lines hidden --- | 78} 79 80void 81TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t) 82{ 83 pkt = _pkt; 84 cpu->schedule(this, t); 85} --- 877 unchanged lines hidden --- |