timing.cc (7725:00ea9430643b) timing.cc (7745:434b5dfb87d9)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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994{
995 if (pkt->isResponse() && !pkt->wasNacked()) {
996 // delay processing of returned data until next CPU clock edge
997 Tick next_tick = cpu->nextCycle(curTick);
998
999 if (next_tick == curTick) {
1000 cpu->completeDataAccess(pkt);
1001 } else {
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 985 unchanged lines hidden (view full) ---

994{
995 if (pkt->isResponse() && !pkt->wasNacked()) {
996 // delay processing of returned data until next CPU clock edge
997 Tick next_tick = cpu->nextCycle(curTick);
998
999 if (next_tick == curTick) {
1000 cpu->completeDataAccess(pkt);
1001 } else {
1002 tickEvent.schedule(pkt, next_tick);
1002 if (!tickEvent.scheduled()) {
1003 tickEvent.schedule(pkt, next_tick);
1004 } else {
1005 // In the case of a split transaction and a cache that is
1006 // faster than a CPU we could get two responses before
1007 // next_tick expires
1008 if (!retryEvent.scheduled())
1009 schedule(retryEvent, next_tick);
1010 return false;
1011 }
1003 }
1004
1005 return true;
1006 }
1007 else if (pkt->wasNacked()) {
1008 assert(cpu->_status == DcacheWaitResponse);
1009 pkt->reinitNacked();
1010 if (!sendTiming(pkt)) {

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1013
1014 return true;
1015 }
1016 else if (pkt->wasNacked()) {
1017 assert(cpu->_status == DcacheWaitResponse);
1018 pkt->reinitNacked();
1019 if (!sendTiming(pkt)) {

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