timing.cc (5408:703f1779cc89) | timing.cc (5496:6899b894166f) |
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1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 131 unchanged lines hidden (view full) --- 140 BaseSimpleCPU::unserialize(cp, section); 141} 142 143unsigned int 144TimingSimpleCPU::drain(Event *drain_event) 145{ 146 // TimingSimpleCPU is ready to drain if it's not waiting for 147 // an access to complete. | 1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 131 unchanged lines hidden (view full) --- 140 BaseSimpleCPU::unserialize(cp, section); 141} 142 143unsigned int 144TimingSimpleCPU::drain(Event *drain_event) 145{ 146 // TimingSimpleCPU is ready to drain if it's not waiting for 147 // an access to complete. |
148 if (status() == Idle || status() == Running || status() == SwitchedOut) { | 148 if (_status == Idle || _status == Running || _status == SwitchedOut) { |
149 changeState(SimObject::Drained); 150 return 0; 151 } else { 152 changeState(SimObject::Draining); 153 drainEvent = drain_event; 154 return 1; 155 } 156} --- 17 unchanged lines hidden (view full) --- 174 } 175 176 changeState(SimObject::Running); 177} 178 179void 180TimingSimpleCPU::switchOut() 181{ | 149 changeState(SimObject::Drained); 150 return 0; 151 } else { 152 changeState(SimObject::Draining); 153 drainEvent = drain_event; 154 return 1; 155 } 156} --- 17 unchanged lines hidden (view full) --- 174 } 175 176 changeState(SimObject::Running); 177} 178 179void 180TimingSimpleCPU::switchOut() 181{ |
182 assert(status() == Running || status() == Idle); | 182 assert(_status == Running || _status == Idle); |
183 _status = SwitchedOut; 184 numCycles += tickToCycles(curTick - previousTick); 185 186 // If we've been scheduled to resume but are then told to switch out, 187 // we'll need to cancel it. 188 if (fetchEvent && fetchEvent->scheduled()) 189 fetchEvent->deschedule(); 190} --- 695 unchanged lines hidden --- | 183 _status = SwitchedOut; 184 numCycles += tickToCycles(curTick - previousTick); 185 186 // If we've been scheduled to resume but are then told to switch out, 187 // we'll need to cancel it. 188 if (fetchEvent && fetchEvent->scheduled()) 189 fetchEvent->deschedule(); 190} --- 695 unchanged lines hidden --- |